1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Copyright (c) 2021 MediaTek Inc.
4 * Copyright (c) 2024 Collabora Ltd.
5 * AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
6 */
7
8 #ifndef _MTK_DAI_ADDA_COMMON_H_
9 #define _MTK_DAI_ADDA_COMMON_H_
10
11 struct mtk_base_afe;
12
13 enum adda_input_mode_rate {
14 MTK_AFE_ADDA_DL_RATE_8K = 0,
15 MTK_AFE_ADDA_DL_RATE_11K = 1,
16 MTK_AFE_ADDA_DL_RATE_12K = 2,
17 MTK_AFE_ADDA_DL_RATE_16K = 3,
18 MTK_AFE_ADDA_DL_RATE_22K = 4,
19 MTK_AFE_ADDA_DL_RATE_24K = 5,
20 MTK_AFE_ADDA_DL_RATE_32K = 6,
21 MTK_AFE_ADDA_DL_RATE_44K = 7,
22 MTK_AFE_ADDA_DL_RATE_48K = 8,
23 MTK_AFE_ADDA_DL_RATE_96K = 9,
24 MTK_AFE_ADDA_DL_RATE_192K = 10,
25 };
26
27 enum adda_voice_mode_rate {
28 MTK_AFE_ADDA_UL_RATE_8K = 0,
29 MTK_AFE_ADDA_UL_RATE_16K = 1,
30 MTK_AFE_ADDA_UL_RATE_32K = 2,
31 MTK_AFE_ADDA_UL_RATE_48K = 3,
32 MTK_AFE_ADDA_UL_RATE_96K = 4,
33 MTK_AFE_ADDA_UL_RATE_192K = 5,
34 MTK_AFE_ADDA_UL_RATE_48K_HD = 6,
35 };
36
37 enum adda_rxif_delay_data {
38 DELAY_DATA_MISO1 = 0,
39 DELAY_DATA_MISO0 = 1,
40 DELAY_DATA_MISO2 = 1,
41 };
42
43 unsigned int mtk_adda_dl_rate_transform(struct mtk_base_afe *afe, u32 rate);
44 unsigned int mtk_adda_ul_rate_transform(struct mtk_base_afe *afe, u32 rate);
45 #endif
46
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