1 /* SPDX-License-Identifier: GPL-2.0 2 * 3 * mt8186-audsys-clk.h -- Mediatek 8186 audsys clock definition 4 * 5 * Copyright (c) 2022 MediaTek Inc. 6 * Author: Trevor Wu <trevor.wu@mediatek.com> 7 */ 8 9 #ifndef _MT8186_AUDSYS_CLK_H_ 10 #define _MT8186_AUDSYS_CLK_H_ 11 12 int mt8186_audsys_clk_register(struct mtk_base_afe *afe); 13 14 #endif 15
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