1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * MediaTek ALSA SoC Audio DAI PCM I/F Control
4 *
5 * Copyright (c) 2020 MediaTek Inc.
6 * Author: Bicycle Tsai <bicycle.tsai@mediatek.com>
7 * Trevor Wu <trevor.wu@mediatek.com>
8 */
9
10 #include <linux/regmap.h>
11 #include <sound/pcm_params.h>
12 #include "mt8195-afe-clk.h"
13 #include "mt8195-afe-common.h"
14 #include "mt8195-reg.h"
15
16 enum {
17 MTK_DAI_PCM_FMT_I2S,
18 MTK_DAI_PCM_FMT_EIAJ,
19 MTK_DAI_PCM_FMT_MODEA,
20 MTK_DAI_PCM_FMT_MODEB,
21 };
22
23 enum {
24 MTK_DAI_PCM_CLK_A1SYS,
25 MTK_DAI_PCM_CLK_A2SYS,
26 MTK_DAI_PCM_CLK_26M_48K,
27 MTK_DAI_PCM_CLK_26M_441K,
28 };
29
30 struct mtk_dai_pcm_rate {
31 unsigned int rate;
32 unsigned int reg_value;
33 };
34
35 struct mtk_dai_pcmif_priv {
36 unsigned int slave_mode;
37 unsigned int lrck_inv;
38 unsigned int bck_inv;
39 unsigned int format;
40 };
41
42 static const struct mtk_dai_pcm_rate mtk_dai_pcm_rates[] = {
43 { .rate = 8000, .reg_value = 0, },
44 { .rate = 16000, .reg_value = 1, },
45 { .rate = 32000, .reg_value = 2, },
46 { .rate = 48000, .reg_value = 3, },
47 { .rate = 11025, .reg_value = 1, },
48 { .rate = 22050, .reg_value = 2, },
49 { .rate = 44100, .reg_value = 3, },
50 };
51
52 static int mtk_dai_pcm_mode(unsigned int rate)
53 {
54 int i;
55
56 for (i = 0; i < ARRAY_SIZE(mtk_dai_pcm_rates); i++)
57 if (mtk_dai_pcm_rates[i].rate == rate)
58 return mtk_dai_pcm_rates[i].reg_value;
59
60 return -EINVAL;
61 }
62
63 static const struct snd_kcontrol_new mtk_dai_pcm_o000_mix[] = {
64 SOC_DAPM_SINGLE_AUTODISABLE("I000 Switch", AFE_CONN0, 0, 1, 0),
65 SOC_DAPM_SINGLE_AUTODISABLE("I070 Switch", AFE_CONN0_2, 6, 1, 0),
66 };
67
68 static const struct snd_kcontrol_new mtk_dai_pcm_o001_mix[] = {
69 SOC_DAPM_SINGLE_AUTODISABLE("I001 Switch", AFE_CONN1, 1, 1, 0),
70 SOC_DAPM_SINGLE_AUTODISABLE("I071 Switch", AFE_CONN1_2, 7, 1, 0),
71 };
72
73 static const struct snd_soc_dapm_widget mtk_dai_pcm_widgets[] = {
74 SND_SOC_DAPM_MIXER("I002", SND_SOC_NOPM, 0, 0, NULL, 0),
75 SND_SOC_DAPM_MIXER("I003", SND_SOC_NOPM, 0, 0, NULL, 0),
76 SND_SOC_DAPM_MIXER("O000", SND_SOC_NOPM, 0, 0,
77 mtk_dai_pcm_o000_mix,
78 ARRAY_SIZE(mtk_dai_pcm_o000_mix)),
79 SND_SOC_DAPM_MIXER("O001", SND_SOC_NOPM, 0, 0,
80 mtk_dai_pcm_o001_mix,
81 ARRAY_SIZE(mtk_dai_pcm_o001_mix)),
82
83 SND_SOC_DAPM_SUPPLY("PCM_EN", PCM_INTF_CON1,
84 PCM_INTF_CON1_PCM_EN_SHIFT, 0, NULL, 0),
85
86 SND_SOC_DAPM_INPUT("PCM1_INPUT"),
87 SND_SOC_DAPM_OUTPUT("PCM1_OUTPUT"),
88
89 SND_SOC_DAPM_CLOCK_SUPPLY("aud_asrc11"),
90 SND_SOC_DAPM_CLOCK_SUPPLY("aud_asrc12"),
91 SND_SOC_DAPM_CLOCK_SUPPLY("aud_pcmif"),
92 };
93
94 static const struct snd_soc_dapm_route mtk_dai_pcm_routes[] = {
95 {"I002", NULL, "PCM1 Capture"},
96 {"I003", NULL, "PCM1 Capture"},
97
98 {"O000", "I000 Switch", "I000"},
99 {"O001", "I001 Switch", "I001"},
100
101 {"O000", "I070 Switch", "I070"},
102 {"O001", "I071 Switch", "I071"},
103
104 {"PCM1 Playback", NULL, "O000"},
105 {"PCM1 Playback", NULL, "O001"},
106
107 {"PCM1 Playback", NULL, "PCM_EN"},
108 {"PCM1 Playback", NULL, "aud_asrc12"},
109 {"PCM1 Playback", NULL, "aud_pcmif"},
110
111 {"PCM1 Capture", NULL, "PCM_EN"},
112 {"PCM1 Capture", NULL, "aud_asrc11"},
113 {"PCM1 Capture", NULL, "aud_pcmif"},
114
115 {"PCM1_OUTPUT", NULL, "PCM1 Playback"},
116 {"PCM1 Capture", NULL, "PCM1_INPUT"},
117 };
118
119 static int mtk_dai_pcm_configure(struct snd_pcm_substream *substream,
120 struct snd_soc_dai *dai)
121 {
122 struct snd_pcm_runtime * const runtime = substream->runtime;
123 struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
124 struct mt8195_afe_private *afe_priv = afe->platform_priv;
125 struct mtk_dai_pcmif_priv *pcmif_priv;
126 unsigned int slave_mode;
127 unsigned int lrck_inv;
128 unsigned int bck_inv;
129 unsigned int fmt;
130 unsigned int bit_width = dai->sample_bits;
131 unsigned int val = 0;
132 unsigned int mask = 0;
133 int fs = 0;
134 int mode = 0;
135
136 if (dai->id != MT8195_AFE_IO_PCM)
137 return -EINVAL;
138
139 pcmif_priv = afe_priv->dai_priv[dai->id];
140 slave_mode = pcmif_priv->slave_mode;
141 lrck_inv = pcmif_priv->lrck_inv;
142 bck_inv = pcmif_priv->bck_inv;
143 fmt = pcmif_priv->format;
144
145 /* sync freq mode */
146 fs = mt8195_afe_fs_timing(runtime->rate);
147 if (fs < 0)
148 return -EINVAL;
149 val |= PCM_INTF_CON2_SYNC_FREQ_MODE(fs);
150 mask |= PCM_INTF_CON2_SYNC_FREQ_MODE_MASK;
151
152 /* clk domain sel */
153 if (runtime->rate % 8000)
154 val |= PCM_INTF_CON2_CLK_DOMAIN_SEL(MTK_DAI_PCM_CLK_26M_441K);
155 else
156 val |= PCM_INTF_CON2_CLK_DOMAIN_SEL(MTK_DAI_PCM_CLK_26M_48K);
157 mask |= PCM_INTF_CON2_CLK_DOMAIN_SEL_MASK;
158
159 regmap_update_bits(afe->regmap, PCM_INTF_CON2, mask, val);
160
161 val = 0;
162 mask = 0;
163
164 /* pcm mode */
165 mode = mtk_dai_pcm_mode(runtime->rate);
166 if (mode < 0)
167 return -EINVAL;
168 val |= PCM_INTF_CON1_PCM_MODE(mode);
169 mask |= PCM_INTF_CON1_PCM_MODE_MASK;
170
171 /* pcm format */
172 val |= PCM_INTF_CON1_PCM_FMT(fmt);
173 mask |= PCM_INTF_CON1_PCM_FMT_MASK;
174
175 /* pcm sync length */
176 if (fmt == MTK_DAI_PCM_FMT_MODEA ||
177 fmt == MTK_DAI_PCM_FMT_MODEB)
178 val |= PCM_INTF_CON1_SYNC_LENGTH(1);
179 else
180 val |= PCM_INTF_CON1_SYNC_LENGTH(bit_width);
181 mask |= PCM_INTF_CON1_SYNC_LENGTH_MASK;
182
183 /* pcm bits, word length */
184 if (bit_width > 16) {
185 val |= PCM_INTF_CON1_PCM_24BIT;
186 val |= PCM_INTF_CON1_PCM_WLEN_64BCK;
187 } else {
188 val |= PCM_INTF_CON1_PCM_16BIT;
189 val |= PCM_INTF_CON1_PCM_WLEN_32BCK;
190 }
191 mask |= PCM_INTF_CON1_PCM_BIT_MASK;
192 mask |= PCM_INTF_CON1_PCM_WLEN_MASK;
193
194 /* master/slave */
195 if (!slave_mode) {
196 val |= PCM_INTF_CON1_PCM_MASTER;
197
198 if (lrck_inv)
199 val |= PCM_INTF_CON1_SYNC_OUT_INV;
200 if (bck_inv)
201 val |= PCM_INTF_CON1_BCLK_OUT_INV;
202 mask |= PCM_INTF_CON1_CLK_OUT_INV_MASK;
203 } else {
204 val |= PCM_INTF_CON1_PCM_SLAVE;
205
206 if (lrck_inv)
207 val |= PCM_INTF_CON1_SYNC_IN_INV;
208 if (bck_inv)
209 val |= PCM_INTF_CON1_BCLK_IN_INV;
210 mask |= PCM_INTF_CON1_CLK_IN_INV_MASK;
211
212 /* TODO: add asrc setting for slave mode */
213 }
214 mask |= PCM_INTF_CON1_PCM_M_S_MASK;
215
216 regmap_update_bits(afe->regmap, PCM_INTF_CON1, mask, val);
217
218 return 0;
219 }
220
221 /* dai ops */
222 static int mtk_dai_pcm_prepare(struct snd_pcm_substream *substream,
223 struct snd_soc_dai *dai)
224 {
225 struct snd_soc_dapm_widget *p = snd_soc_dai_get_widget_playback(dai);
226 struct snd_soc_dapm_widget *c = snd_soc_dai_get_widget_capture(dai);
227
228 dev_dbg(dai->dev, "%s(), id %d, stream %d, widget active p %d, c %d\n",
229 __func__, dai->id, substream->stream,
230 p->active, c->active);
231
232 if (p->active || c->active)
233 return 0;
234
235 return mtk_dai_pcm_configure(substream, dai);
236 }
237
238 static int mtk_dai_pcm_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
239 {
240 struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
241 struct mt8195_afe_private *afe_priv = afe->platform_priv;
242 struct mtk_dai_pcmif_priv *pcmif_priv;
243
244 dev_dbg(dai->dev, "%s fmt 0x%x\n", __func__, fmt);
245
246 if (dai->id != MT8195_AFE_IO_PCM)
247 return -EINVAL;
248
249 pcmif_priv = afe_priv->dai_priv[dai->id];
250
251 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
252 case SND_SOC_DAIFMT_I2S:
253 pcmif_priv->format = MTK_DAI_PCM_FMT_I2S;
254 break;
255 case SND_SOC_DAIFMT_DSP_A:
256 pcmif_priv->format = MTK_DAI_PCM_FMT_MODEA;
257 break;
258 case SND_SOC_DAIFMT_DSP_B:
259 pcmif_priv->format = MTK_DAI_PCM_FMT_MODEB;
260 break;
261 default:
262 return -EINVAL;
263 }
264
265 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
266 case SND_SOC_DAIFMT_NB_NF:
267 pcmif_priv->bck_inv = 0;
268 pcmif_priv->lrck_inv = 0;
269 break;
270 case SND_SOC_DAIFMT_NB_IF:
271 pcmif_priv->bck_inv = 0;
272 pcmif_priv->lrck_inv = 1;
273 break;
274 case SND_SOC_DAIFMT_IB_NF:
275 pcmif_priv->bck_inv = 1;
276 pcmif_priv->lrck_inv = 0;
277 break;
278 case SND_SOC_DAIFMT_IB_IF:
279 pcmif_priv->bck_inv = 1;
280 pcmif_priv->lrck_inv = 1;
281 break;
282 default:
283 return -EINVAL;
284 }
285
286 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
287 case SND_SOC_DAIFMT_BC_FC:
288 pcmif_priv->slave_mode = 1;
289 break;
290 case SND_SOC_DAIFMT_BP_FP:
291 pcmif_priv->slave_mode = 0;
292 break;
293 default:
294 return -EINVAL;
295 }
296
297 return 0;
298 }
299
300 static const struct snd_soc_dai_ops mtk_dai_pcm_ops = {
301 .prepare = mtk_dai_pcm_prepare,
302 .set_fmt = mtk_dai_pcm_set_fmt,
303 };
304
305 /* dai driver */
306 #define MTK_PCM_RATES (SNDRV_PCM_RATE_8000_48000)
307
308 #define MTK_PCM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
309 SNDRV_PCM_FMTBIT_S24_LE |\
310 SNDRV_PCM_FMTBIT_S32_LE)
311
312 static struct snd_soc_dai_driver mtk_dai_pcm_driver[] = {
313 {
314 .name = "PCM1",
315 .id = MT8195_AFE_IO_PCM,
316 .playback = {
317 .stream_name = "PCM1 Playback",
318 .channels_min = 1,
319 .channels_max = 2,
320 .rates = MTK_PCM_RATES,
321 .formats = MTK_PCM_FORMATS,
322 },
323 .capture = {
324 .stream_name = "PCM1 Capture",
325 .channels_min = 1,
326 .channels_max = 2,
327 .rates = MTK_PCM_RATES,
328 .formats = MTK_PCM_FORMATS,
329 },
330 .ops = &mtk_dai_pcm_ops,
331 .symmetric_rate = 1,
332 .symmetric_sample_bits = 1,
333 },
334 };
335
336 static int init_pcmif_priv_data(struct mtk_base_afe *afe)
337 {
338 struct mt8195_afe_private *afe_priv = afe->platform_priv;
339 struct mtk_dai_pcmif_priv *pcmif_priv;
340
341 pcmif_priv = devm_kzalloc(afe->dev, sizeof(struct mtk_dai_pcmif_priv),
342 GFP_KERNEL);
343 if (!pcmif_priv)
344 return -ENOMEM;
345
346 afe_priv->dai_priv[MT8195_AFE_IO_PCM] = pcmif_priv;
347 return 0;
348 }
349
350 int mt8195_dai_pcm_register(struct mtk_base_afe *afe)
351 {
352 struct mtk_base_afe_dai *dai;
353
354 dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL);
355 if (!dai)
356 return -ENOMEM;
357
358 list_add(&dai->list, &afe->sub_dais);
359
360 dai->dai_drivers = mtk_dai_pcm_driver;
361 dai->num_dai_drivers = ARRAY_SIZE(mtk_dai_pcm_driver);
362
363 dai->dapm_widgets = mtk_dai_pcm_widgets;
364 dai->num_dapm_widgets = ARRAY_SIZE(mtk_dai_pcm_widgets);
365 dai->dapm_routes = mtk_dai_pcm_routes;
366 dai->num_dapm_routes = ARRAY_SIZE(mtk_dai_pcm_routes);
367
368 return init_pcmif_priv_data(afe);
369 }
370
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