1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2 //
3 // This file is provided under a dual BSD/GPLv2 license. When using or
4 // redistributing this file, you may do so under either license.
5 //
6 // Copyright(c) 2022 Intel Corporation
7 //
8 // Authors: Rander Wang <rander.wang@linux.intel.com>
9 // Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
10 //
11 #include <linux/firmware.h>
12 #include <sound/sof/header.h>
13 #include <sound/sof/ipc4/header.h>
14 #include "sof-priv.h"
15 #include "sof-audio.h"
16 #include "ipc4-fw-reg.h"
17 #include "ipc4-priv.h"
18 #include "ipc4-telemetry.h"
19 #include "ops.h"
20
21 static const struct sof_ipc4_fw_status {
22 int status;
23 char *msg;
24 } ipc4_status[] = {
25 {0, "The operation was successful"},
26 {1, "Invalid parameter specified"},
27 {2, "Unknown message type specified"},
28 {3, "Not enough space in the IPC reply buffer to complete the request"},
29 {4, "The system or resource is busy"},
30 {5, "Replaced ADSP IPC PENDING (unused)"},
31 {6, "Unknown error while processing the request"},
32 {7, "Unsupported operation requested"},
33 {8, "Reserved (ADSP_STAGE_UNINITIALIZED removed)"},
34 {9, "Specified resource not found"},
35 {10, "A resource's ID requested to be created is already assigned"},
36 {11, "Reserved (ADSP_IPC_OUT_OF_MIPS removed)"},
37 {12, "Required resource is in invalid state"},
38 {13, "Requested power transition failed to complete"},
39 {14, "Manifest of the library being loaded is invalid"},
40 {15, "Requested service or data is unavailable on the target platform"},
41 {42, "Library target address is out of storage memory range"},
42 {43, "Reserved"},
43 {44, "Image verification by CSE failed"},
44 {100, "General module management error"},
45 {101, "Module loading failed"},
46 {102, "Integrity check of the loaded module content failed"},
47 {103, "Attempt to unload code of the module in use"},
48 {104, "Other failure of module instance initialization request"},
49 {105, "Reserved (ADSP_IPC_OUT_OF_MIPS removed)"},
50 {106, "Reserved (ADSP_IPC_CONFIG_GET_ERROR removed)"},
51 {107, "Reserved (ADSP_IPC_CONFIG_SET_ERROR removed)"},
52 {108, "Reserved (ADSP_IPC_LARGE_CONFIG_GET_ERROR removed)"},
53 {109, "Reserved (ADSP_IPC_LARGE_CONFIG_SET_ERROR removed)"},
54 {110, "Invalid (out of range) module ID provided"},
55 {111, "Invalid module instance ID provided"},
56 {112, "Invalid queue (pin) ID provided"},
57 {113, "Invalid destination queue (pin) ID provided"},
58 {114, "Reserved (ADSP_IPC_BIND_UNBIND_DST_SINK_UNSUPPORTED removed)"},
59 {115, "Reserved (ADSP_IPC_UNLOAD_INST_EXISTS removed)"},
60 {116, "Invalid target code ID provided"},
61 {117, "Injection DMA buffer is too small for probing the input pin"},
62 {118, "Extraction DMA buffer is too small for probing the output pin"},
63 {120, "Invalid ID of configuration item provided in TLV list"},
64 {121, "Invalid length of configuration item provided in TLV list"},
65 {122, "Invalid structure of configuration item provided"},
66 {140, "Initialization of DMA Gateway failed"},
67 {141, "Invalid ID of gateway provided"},
68 {142, "Setting state of DMA Gateway failed"},
69 {143, "DMA_CONTROL message targeting gateway not allocated yet"},
70 {150, "Attempt to configure SCLK while I2S port is running"},
71 {151, "Attempt to configure MCLK while I2S port is running"},
72 {152, "Attempt to stop SCLK that is not running"},
73 {153, "Attempt to stop MCLK that is not running"},
74 {160, "Reserved (ADSP_IPC_PIPELINE_NOT_INITIALIZED removed)"},
75 {161, "Reserved (ADSP_IPC_PIPELINE_NOT_EXIST removed)"},
76 {162, "Reserved (ADSP_IPC_PIPELINE_SAVE_FAILED removed)"},
77 {163, "Reserved (ADSP_IPC_PIPELINE_RESTORE_FAILED removed)"},
78 {165, "Reserved (ADSP_IPC_PIPELINE_ALREADY_EXISTS removed)"},
79 };
80
81 typedef void (*ipc4_notification_handler)(struct snd_sof_dev *sdev,
82 struct sof_ipc4_msg *msg);
83
84 static int sof_ipc4_check_reply_status(struct snd_sof_dev *sdev, u32 status)
85 {
86 int i, ret;
87
88 status &= SOF_IPC4_REPLY_STATUS;
89
90 if (!status)
91 return 0;
92
93 for (i = 0; i < ARRAY_SIZE(ipc4_status); i++) {
94 if (ipc4_status[i].status == status) {
95 dev_err(sdev->dev, "FW reported error: %u - %s\n",
96 status, ipc4_status[i].msg);
97 goto to_errno;
98 }
99 }
100
101 if (i == ARRAY_SIZE(ipc4_status))
102 dev_err(sdev->dev, "FW reported error: %u - Unknown\n", status);
103
104 to_errno:
105 switch (status) {
106 case 2:
107 case 15:
108 ret = -EOPNOTSUPP;
109 break;
110 case 8:
111 case 11:
112 case 105 ... 109:
113 case 114 ... 115:
114 case 160 ... 163:
115 case 165:
116 ret = -ENOENT;
117 break;
118 case 4:
119 case 150:
120 case 151:
121 ret = -EBUSY;
122 break;
123 default:
124 ret = -EINVAL;
125 break;
126 }
127
128 return ret;
129 }
130
131 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC)
132 #define DBG_IPC4_MSG_TYPE_ENTRY(type) [SOF_IPC4_##type] = #type
133 static const char * const ipc4_dbg_mod_msg_type[] = {
134 DBG_IPC4_MSG_TYPE_ENTRY(MOD_INIT_INSTANCE),
135 DBG_IPC4_MSG_TYPE_ENTRY(MOD_CONFIG_GET),
136 DBG_IPC4_MSG_TYPE_ENTRY(MOD_CONFIG_SET),
137 DBG_IPC4_MSG_TYPE_ENTRY(MOD_LARGE_CONFIG_GET),
138 DBG_IPC4_MSG_TYPE_ENTRY(MOD_LARGE_CONFIG_SET),
139 DBG_IPC4_MSG_TYPE_ENTRY(MOD_BIND),
140 DBG_IPC4_MSG_TYPE_ENTRY(MOD_UNBIND),
141 DBG_IPC4_MSG_TYPE_ENTRY(MOD_SET_DX),
142 DBG_IPC4_MSG_TYPE_ENTRY(MOD_SET_D0IX),
143 DBG_IPC4_MSG_TYPE_ENTRY(MOD_ENTER_MODULE_RESTORE),
144 DBG_IPC4_MSG_TYPE_ENTRY(MOD_EXIT_MODULE_RESTORE),
145 DBG_IPC4_MSG_TYPE_ENTRY(MOD_DELETE_INSTANCE),
146 };
147
148 static const char * const ipc4_dbg_glb_msg_type[] = {
149 DBG_IPC4_MSG_TYPE_ENTRY(GLB_BOOT_CONFIG),
150 DBG_IPC4_MSG_TYPE_ENTRY(GLB_ROM_CONTROL),
151 DBG_IPC4_MSG_TYPE_ENTRY(GLB_IPCGATEWAY_CMD),
152 DBG_IPC4_MSG_TYPE_ENTRY(GLB_PERF_MEASUREMENTS_CMD),
153 DBG_IPC4_MSG_TYPE_ENTRY(GLB_CHAIN_DMA),
154 DBG_IPC4_MSG_TYPE_ENTRY(GLB_LOAD_MULTIPLE_MODULES),
155 DBG_IPC4_MSG_TYPE_ENTRY(GLB_UNLOAD_MULTIPLE_MODULES),
156 DBG_IPC4_MSG_TYPE_ENTRY(GLB_CREATE_PIPELINE),
157 DBG_IPC4_MSG_TYPE_ENTRY(GLB_DELETE_PIPELINE),
158 DBG_IPC4_MSG_TYPE_ENTRY(GLB_SET_PIPELINE_STATE),
159 DBG_IPC4_MSG_TYPE_ENTRY(GLB_GET_PIPELINE_STATE),
160 DBG_IPC4_MSG_TYPE_ENTRY(GLB_GET_PIPELINE_CONTEXT_SIZE),
161 DBG_IPC4_MSG_TYPE_ENTRY(GLB_SAVE_PIPELINE),
162 DBG_IPC4_MSG_TYPE_ENTRY(GLB_RESTORE_PIPELINE),
163 DBG_IPC4_MSG_TYPE_ENTRY(GLB_LOAD_LIBRARY),
164 DBG_IPC4_MSG_TYPE_ENTRY(GLB_LOAD_LIBRARY_PREPARE),
165 DBG_IPC4_MSG_TYPE_ENTRY(GLB_INTERNAL_MESSAGE),
166 DBG_IPC4_MSG_TYPE_ENTRY(GLB_NOTIFICATION),
167 };
168
169 #define DBG_IPC4_NOTIFICATION_TYPE_ENTRY(type) [SOF_IPC4_NOTIFY_##type] = #type
170 static const char * const ipc4_dbg_notification_type[] = {
171 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(PHRASE_DETECTED),
172 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(RESOURCE_EVENT),
173 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(LOG_BUFFER_STATUS),
174 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(TIMESTAMP_CAPTURED),
175 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(FW_READY),
176 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(FW_AUD_CLASS_RESULT),
177 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(EXCEPTION_CAUGHT),
178 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(MODULE_NOTIFICATION),
179 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(PROBE_DATA_AVAILABLE),
180 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(ASYNC_MSG_SRVC_MESSAGE),
181 };
182
183 static void sof_ipc4_log_header(struct device *dev, u8 *text, struct sof_ipc4_msg *msg,
184 bool data_size_valid)
185 {
186 u32 val, type;
187 const u8 *str2 = NULL;
188 const u8 *str = NULL;
189
190 val = msg->primary & SOF_IPC4_MSG_TARGET_MASK;
191 type = SOF_IPC4_MSG_TYPE_GET(msg->primary);
192
193 if (val == SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG)) {
194 /* Module message */
195 if (type < SOF_IPC4_MOD_TYPE_LAST)
196 str = ipc4_dbg_mod_msg_type[type];
197 if (!str)
198 str = "Unknown Module message type";
199 } else {
200 /* Global FW message */
201 if (type < SOF_IPC4_GLB_TYPE_LAST)
202 str = ipc4_dbg_glb_msg_type[type];
203 if (!str)
204 str = "Unknown Global message type";
205
206 if (type == SOF_IPC4_GLB_NOTIFICATION) {
207 /* Notification message */
208 u32 notif = SOF_IPC4_NOTIFICATION_TYPE_GET(msg->primary);
209
210 /* Do not print log buffer notification if not desired */
211 if (notif == SOF_IPC4_NOTIFY_LOG_BUFFER_STATUS &&
212 !sof_debug_check_flag(SOF_DBG_PRINT_DMA_POSITION_UPDATE_LOGS))
213 return;
214
215 if (notif < SOF_IPC4_NOTIFY_TYPE_LAST)
216 str2 = ipc4_dbg_notification_type[notif];
217 if (!str2)
218 str2 = "Unknown Global notification";
219 }
220 }
221
222 if (str2) {
223 if (data_size_valid && msg->data_size)
224 dev_dbg(dev, "%s: %#x|%#x: %s|%s [data size: %zu]\n",
225 text, msg->primary, msg->extension, str, str2,
226 msg->data_size);
227 else
228 dev_dbg(dev, "%s: %#x|%#x: %s|%s\n", text, msg->primary,
229 msg->extension, str, str2);
230 } else {
231 if (data_size_valid && msg->data_size)
232 dev_dbg(dev, "%s: %#x|%#x: %s [data size: %zu]\n",
233 text, msg->primary, msg->extension, str,
234 msg->data_size);
235 else
236 dev_dbg(dev, "%s: %#x|%#x: %s\n", text, msg->primary,
237 msg->extension, str);
238 }
239 }
240 #else /* CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC */
241 static void sof_ipc4_log_header(struct device *dev, u8 *text, struct sof_ipc4_msg *msg,
242 bool data_size_valid)
243 {
244 /* Do not print log buffer notification if not desired */
245 if (!sof_debug_check_flag(SOF_DBG_PRINT_DMA_POSITION_UPDATE_LOGS) &&
246 !SOF_IPC4_MSG_IS_MODULE_MSG(msg->primary) &&
247 SOF_IPC4_MSG_TYPE_GET(msg->primary) == SOF_IPC4_GLB_NOTIFICATION &&
248 SOF_IPC4_NOTIFICATION_TYPE_GET(msg->primary) == SOF_IPC4_NOTIFY_LOG_BUFFER_STATUS)
249 return;
250
251 if (data_size_valid && msg->data_size)
252 dev_dbg(dev, "%s: %#x|%#x [data size: %zu]\n", text,
253 msg->primary, msg->extension, msg->data_size);
254 else
255 dev_dbg(dev, "%s: %#x|%#x\n", text, msg->primary, msg->extension);
256 }
257 #endif
258
259 static void sof_ipc4_dump_payload(struct snd_sof_dev *sdev,
260 void *ipc_data, size_t size)
261 {
262 print_hex_dump_debug("Message payload: ", DUMP_PREFIX_OFFSET,
263 16, 4, ipc_data, size, false);
264 }
265
266 static int sof_ipc4_get_reply(struct snd_sof_dev *sdev)
267 {
268 struct snd_sof_ipc_msg *msg = sdev->msg;
269 struct sof_ipc4_msg *ipc4_reply;
270 int ret;
271
272 /* get the generic reply */
273 ipc4_reply = msg->reply_data;
274
275 sof_ipc4_log_header(sdev->dev, "ipc tx reply", ipc4_reply, false);
276
277 ret = sof_ipc4_check_reply_status(sdev, ipc4_reply->primary);
278 if (ret)
279 return ret;
280
281 /* No other information is expected for non large config get replies */
282 if (!msg->reply_size || !SOF_IPC4_MSG_IS_MODULE_MSG(ipc4_reply->primary) ||
283 (SOF_IPC4_MSG_TYPE_GET(ipc4_reply->primary) != SOF_IPC4_MOD_LARGE_CONFIG_GET))
284 return 0;
285
286 /* Read the requested payload */
287 snd_sof_dsp_mailbox_read(sdev, sdev->dsp_box.offset, ipc4_reply->data_ptr,
288 msg->reply_size);
289
290 return 0;
291 }
292
293 /* wait for IPC message reply */
294 static int ipc4_wait_tx_done(struct snd_sof_ipc *ipc, void *reply_data)
295 {
296 struct snd_sof_ipc_msg *msg = &ipc->msg;
297 struct sof_ipc4_msg *ipc4_msg = msg->msg_data;
298 struct snd_sof_dev *sdev = ipc->sdev;
299 int ret;
300
301 /* wait for DSP IPC completion */
302 ret = wait_event_timeout(msg->waitq, msg->ipc_complete,
303 msecs_to_jiffies(sdev->ipc_timeout));
304 if (ret == 0) {
305 dev_err(sdev->dev, "ipc timed out for %#x|%#x\n",
306 ipc4_msg->primary, ipc4_msg->extension);
307 snd_sof_handle_fw_exception(ipc->sdev, "IPC timeout");
308 return -ETIMEDOUT;
309 }
310
311 if (msg->reply_error) {
312 dev_err(sdev->dev, "ipc error for msg %#x|%#x\n",
313 ipc4_msg->primary, ipc4_msg->extension);
314 ret = msg->reply_error;
315 } else {
316 if (reply_data) {
317 struct sof_ipc4_msg *ipc4_reply = msg->reply_data;
318 struct sof_ipc4_msg *ipc4_reply_data = reply_data;
319
320 /* Copy the header */
321 ipc4_reply_data->header_u64 = ipc4_reply->header_u64;
322 if (msg->reply_size && ipc4_reply_data->data_ptr) {
323 /* copy the payload returned from DSP */
324 memcpy(ipc4_reply_data->data_ptr, ipc4_reply->data_ptr,
325 msg->reply_size);
326 ipc4_reply_data->data_size = msg->reply_size;
327 }
328 }
329
330 ret = 0;
331 sof_ipc4_log_header(sdev->dev, "ipc tx done ", ipc4_msg, true);
332 }
333
334 /* re-enable dumps after successful IPC tx */
335 if (sdev->ipc_dump_printed) {
336 sdev->dbg_dump_printed = false;
337 sdev->ipc_dump_printed = false;
338 }
339
340 return ret;
341 }
342
343 static int ipc4_tx_msg_unlocked(struct snd_sof_ipc *ipc,
344 void *msg_data, size_t msg_bytes,
345 void *reply_data, size_t reply_bytes)
346 {
347 struct sof_ipc4_msg *ipc4_msg = msg_data;
348 struct snd_sof_dev *sdev = ipc->sdev;
349 int ret;
350
351 if (msg_bytes > ipc->max_payload_size || reply_bytes > ipc->max_payload_size)
352 return -EINVAL;
353
354 sof_ipc4_log_header(sdev->dev, "ipc tx ", msg_data, true);
355
356 ret = sof_ipc_send_msg(sdev, msg_data, msg_bytes, reply_bytes);
357 if (ret) {
358 dev_err_ratelimited(sdev->dev,
359 "%s: ipc message send for %#x|%#x failed: %d\n",
360 __func__, ipc4_msg->primary, ipc4_msg->extension, ret);
361 return ret;
362 }
363
364 /* now wait for completion */
365 return ipc4_wait_tx_done(ipc, reply_data);
366 }
367
368 static int sof_ipc4_tx_msg(struct snd_sof_dev *sdev, void *msg_data, size_t msg_bytes,
369 void *reply_data, size_t reply_bytes, bool no_pm)
370 {
371 struct snd_sof_ipc *ipc = sdev->ipc;
372 int ret;
373
374 if (!msg_data)
375 return -EINVAL;
376
377 if (!no_pm) {
378 const struct sof_dsp_power_state target_state = {
379 .state = SOF_DSP_PM_D0,
380 };
381
382 /* ensure the DSP is in D0i0 before sending a new IPC */
383 ret = snd_sof_dsp_set_power_state(sdev, &target_state);
384 if (ret < 0)
385 return ret;
386 }
387
388 /* Serialise IPC TX */
389 mutex_lock(&ipc->tx_mutex);
390
391 ret = ipc4_tx_msg_unlocked(ipc, msg_data, msg_bytes, reply_data, reply_bytes);
392
393 if (sof_debug_check_flag(SOF_DBG_DUMP_IPC_MESSAGE_PAYLOAD)) {
394 struct sof_ipc4_msg *msg = NULL;
395
396 /* payload is indicated by non zero msg/reply_bytes */
397 if (msg_bytes)
398 msg = msg_data;
399 else if (reply_bytes)
400 msg = reply_data;
401
402 if (msg)
403 sof_ipc4_dump_payload(sdev, msg->data_ptr, msg->data_size);
404 }
405
406 mutex_unlock(&ipc->tx_mutex);
407
408 return ret;
409 }
410
411 static int sof_ipc4_set_get_data(struct snd_sof_dev *sdev, void *data,
412 size_t payload_bytes, bool set)
413 {
414 const struct sof_dsp_power_state target_state = {
415 .state = SOF_DSP_PM_D0,
416 };
417 size_t payload_limit = sdev->ipc->max_payload_size;
418 struct sof_ipc4_msg *ipc4_msg = data;
419 struct sof_ipc4_msg tx = {{ 0 }};
420 struct sof_ipc4_msg rx = {{ 0 }};
421 size_t remaining = payload_bytes;
422 size_t offset = 0;
423 size_t chunk_size;
424 int ret;
425
426 if (!data)
427 return -EINVAL;
428
429 if ((ipc4_msg->primary & SOF_IPC4_MSG_TARGET_MASK) !=
430 SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG))
431 return -EINVAL;
432
433 ipc4_msg->primary &= ~SOF_IPC4_MSG_TYPE_MASK;
434 tx.primary = ipc4_msg->primary;
435 tx.extension = ipc4_msg->extension;
436
437 if (set)
438 tx.primary |= SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_LARGE_CONFIG_SET);
439 else
440 tx.primary |= SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_LARGE_CONFIG_GET);
441
442 tx.extension &= ~SOF_IPC4_MOD_EXT_MSG_SIZE_MASK;
443 tx.extension |= SOF_IPC4_MOD_EXT_MSG_SIZE(payload_bytes);
444
445 tx.extension |= SOF_IPC4_MOD_EXT_MSG_FIRST_BLOCK(1);
446
447 /* ensure the DSP is in D0i0 before sending IPC */
448 ret = snd_sof_dsp_set_power_state(sdev, &target_state);
449 if (ret < 0)
450 return ret;
451
452 /* Serialise IPC TX */
453 mutex_lock(&sdev->ipc->tx_mutex);
454
455 do {
456 size_t tx_size, rx_size;
457
458 if (remaining > payload_limit) {
459 chunk_size = payload_limit;
460 } else {
461 chunk_size = remaining;
462 if (set)
463 tx.extension |= SOF_IPC4_MOD_EXT_MSG_LAST_BLOCK(1);
464 }
465
466 if (offset) {
467 tx.extension &= ~SOF_IPC4_MOD_EXT_MSG_FIRST_BLOCK_MASK;
468 tx.extension &= ~SOF_IPC4_MOD_EXT_MSG_SIZE_MASK;
469 tx.extension |= SOF_IPC4_MOD_EXT_MSG_SIZE(offset);
470 }
471
472 if (set) {
473 tx.data_size = chunk_size;
474 tx.data_ptr = ipc4_msg->data_ptr + offset;
475
476 tx_size = chunk_size;
477 rx_size = 0;
478 } else {
479 rx.primary = 0;
480 rx.extension = 0;
481 rx.data_size = chunk_size;
482 rx.data_ptr = ipc4_msg->data_ptr + offset;
483
484 tx_size = 0;
485 rx_size = chunk_size;
486 }
487
488 /* Send the message for the current chunk */
489 ret = ipc4_tx_msg_unlocked(sdev->ipc, &tx, tx_size, &rx, rx_size);
490 if (ret < 0) {
491 dev_err(sdev->dev,
492 "%s: large config %s failed at offset %zu: %d\n",
493 __func__, set ? "set" : "get", offset, ret);
494 goto out;
495 }
496
497 if (!set && rx.extension & SOF_IPC4_MOD_EXT_MSG_FIRST_BLOCK_MASK) {
498 /* Verify the firmware reported total payload size */
499 rx_size = rx.extension & SOF_IPC4_MOD_EXT_MSG_SIZE_MASK;
500
501 if (rx_size > payload_bytes) {
502 dev_err(sdev->dev,
503 "%s: Receive buffer (%zu) is too small for %zu\n",
504 __func__, payload_bytes, rx_size);
505 ret = -ENOMEM;
506 goto out;
507 }
508
509 if (rx_size < chunk_size) {
510 chunk_size = rx_size;
511 remaining = rx_size;
512 } else if (rx_size < payload_bytes) {
513 remaining = rx_size;
514 }
515 }
516
517 offset += chunk_size;
518 remaining -= chunk_size;
519 } while (remaining);
520
521 /* Adjust the received data size if needed */
522 if (!set && payload_bytes != offset)
523 ipc4_msg->data_size = offset;
524
525 out:
526 if (sof_debug_check_flag(SOF_DBG_DUMP_IPC_MESSAGE_PAYLOAD))
527 sof_ipc4_dump_payload(sdev, ipc4_msg->data_ptr, ipc4_msg->data_size);
528
529 mutex_unlock(&sdev->ipc->tx_mutex);
530
531 return ret;
532 }
533
534 static int sof_ipc4_init_msg_memory(struct snd_sof_dev *sdev)
535 {
536 struct sof_ipc4_msg *ipc4_msg;
537 struct snd_sof_ipc_msg *msg = &sdev->ipc->msg;
538
539 /* TODO: get max_payload_size from firmware */
540 sdev->ipc->max_payload_size = SOF_IPC4_MSG_MAX_SIZE;
541
542 /* Allocate memory for the ipc4 container and the maximum payload */
543 msg->reply_data = devm_kzalloc(sdev->dev, sdev->ipc->max_payload_size +
544 sizeof(struct sof_ipc4_msg), GFP_KERNEL);
545 if (!msg->reply_data)
546 return -ENOMEM;
547
548 ipc4_msg = msg->reply_data;
549 ipc4_msg->data_ptr = msg->reply_data + sizeof(struct sof_ipc4_msg);
550
551 return 0;
552 }
553
554 size_t sof_ipc4_find_debug_slot_offset_by_type(struct snd_sof_dev *sdev,
555 u32 slot_type)
556 {
557 size_t slot_desc_type_offset;
558 u32 type;
559 int i;
560
561 /* The type is the second u32 in the slot descriptor */
562 slot_desc_type_offset = sdev->debug_box.offset + sizeof(u32);
563 for (i = 0; i < SOF_IPC4_MAX_DEBUG_SLOTS; i++) {
564 sof_mailbox_read(sdev, slot_desc_type_offset, &type, sizeof(type));
565
566 if (type == slot_type)
567 return sdev->debug_box.offset + (i + 1) * SOF_IPC4_DEBUG_SLOT_SIZE;
568
569 slot_desc_type_offset += SOF_IPC4_DEBUG_DESCRIPTOR_SIZE;
570 }
571
572 dev_dbg(sdev->dev, "Slot type %#x is not available in debug window\n", slot_type);
573 return 0;
574 }
575 EXPORT_SYMBOL(sof_ipc4_find_debug_slot_offset_by_type);
576
577 static int ipc4_fw_ready(struct snd_sof_dev *sdev, struct sof_ipc4_msg *ipc4_msg)
578 {
579 /* no need to re-check version/ABI for subsequent boots */
580 if (!sdev->first_boot)
581 return 0;
582
583 sof_ipc4_create_exception_debugfs_node(sdev);
584
585 return sof_ipc4_init_msg_memory(sdev);
586 }
587
588 static void sof_ipc4_module_notification_handler(struct snd_sof_dev *sdev,
589 struct sof_ipc4_msg *ipc4_msg)
590 {
591 struct sof_ipc4_notify_module_data *data = ipc4_msg->data_ptr;
592
593 /*
594 * If the notification includes additional, module specific data, then
595 * we need to re-allocate the buffer and re-read the whole payload,
596 * including the event_data
597 */
598 if (data->event_data_size) {
599 void *new;
600 int ret;
601
602 ipc4_msg->data_size += data->event_data_size;
603
604 new = krealloc(ipc4_msg->data_ptr, ipc4_msg->data_size, GFP_KERNEL);
605 if (!new) {
606 ipc4_msg->data_size -= data->event_data_size;
607 return;
608 }
609
610 /* re-read the whole payload */
611 ipc4_msg->data_ptr = new;
612 ret = snd_sof_ipc_msg_data(sdev, NULL, ipc4_msg->data_ptr,
613 ipc4_msg->data_size);
614 if (ret < 0) {
615 dev_err(sdev->dev,
616 "Failed to read the full module notification: %d\n",
617 ret);
618 return;
619 }
620 data = ipc4_msg->data_ptr;
621 }
622
623 /* Handle ALSA kcontrol notification */
624 if ((data->event_id & SOF_IPC4_NOTIFY_MODULE_EVENTID_ALSA_MAGIC_MASK) ==
625 SOF_IPC4_NOTIFY_MODULE_EVENTID_ALSA_MAGIC_VAL) {
626 const struct sof_ipc_tplg_ops *tplg_ops = sdev->ipc->ops->tplg;
627
628 if (tplg_ops->control->update)
629 tplg_ops->control->update(sdev, ipc4_msg);
630 }
631 }
632
633 static void sof_ipc4_rx_msg(struct snd_sof_dev *sdev)
634 {
635 struct sof_ipc4_msg *ipc4_msg = sdev->ipc->msg.rx_data;
636 ipc4_notification_handler handler_func = NULL;
637 size_t data_size = 0;
638 int err;
639
640 if (!ipc4_msg || !SOF_IPC4_MSG_IS_NOTIFICATION(ipc4_msg->primary))
641 return;
642
643 ipc4_msg->data_ptr = NULL;
644 ipc4_msg->data_size = 0;
645
646 sof_ipc4_log_header(sdev->dev, "ipc rx ", ipc4_msg, false);
647
648 switch (SOF_IPC4_NOTIFICATION_TYPE_GET(ipc4_msg->primary)) {
649 case SOF_IPC4_NOTIFY_FW_READY:
650 /* check for FW boot completion */
651 if (sdev->fw_state == SOF_FW_BOOT_IN_PROGRESS) {
652 err = ipc4_fw_ready(sdev, ipc4_msg);
653 if (err < 0)
654 sof_set_fw_state(sdev, SOF_FW_BOOT_READY_FAILED);
655 else
656 sof_set_fw_state(sdev, SOF_FW_BOOT_READY_OK);
657
658 /* wake up firmware loader */
659 wake_up(&sdev->boot_wait);
660 }
661
662 break;
663 case SOF_IPC4_NOTIFY_RESOURCE_EVENT:
664 data_size = sizeof(struct sof_ipc4_notify_resource_data);
665 break;
666 case SOF_IPC4_NOTIFY_LOG_BUFFER_STATUS:
667 sof_ipc4_mtrace_update_pos(sdev, SOF_IPC4_LOG_CORE_GET(ipc4_msg->primary));
668 break;
669 case SOF_IPC4_NOTIFY_EXCEPTION_CAUGHT:
670 snd_sof_dsp_panic(sdev, 0, true);
671 break;
672 case SOF_IPC4_NOTIFY_MODULE_NOTIFICATION:
673 data_size = sizeof(struct sof_ipc4_notify_module_data);
674 handler_func = sof_ipc4_module_notification_handler;
675 break;
676 default:
677 dev_dbg(sdev->dev, "Unhandled DSP message: %#x|%#x\n",
678 ipc4_msg->primary, ipc4_msg->extension);
679 break;
680 }
681
682 if (data_size) {
683 ipc4_msg->data_ptr = kmalloc(data_size, GFP_KERNEL);
684 if (!ipc4_msg->data_ptr)
685 return;
686
687 ipc4_msg->data_size = data_size;
688 err = snd_sof_ipc_msg_data(sdev, NULL, ipc4_msg->data_ptr, ipc4_msg->data_size);
689 if (err < 0) {
690 dev_err(sdev->dev, "failed to read IPC notification data: %d\n", err);
691 kfree(ipc4_msg->data_ptr);
692 ipc4_msg->data_ptr = NULL;
693 ipc4_msg->data_size = 0;
694 return;
695 }
696 }
697
698 /* Handle notifications with payload */
699 if (handler_func)
700 handler_func(sdev, ipc4_msg);
701
702 sof_ipc4_log_header(sdev->dev, "ipc rx done ", ipc4_msg, true);
703
704 if (data_size) {
705 if (sof_debug_check_flag(SOF_DBG_DUMP_IPC_MESSAGE_PAYLOAD))
706 sof_ipc4_dump_payload(sdev, ipc4_msg->data_ptr,
707 ipc4_msg->data_size);
708
709 kfree(ipc4_msg->data_ptr);
710 ipc4_msg->data_ptr = NULL;
711 ipc4_msg->data_size = 0;
712 }
713 }
714
715 static int sof_ipc4_set_core_state(struct snd_sof_dev *sdev, int core_idx, bool on)
716 {
717 struct sof_ipc4_dx_state_info dx_state;
718 struct sof_ipc4_msg msg;
719
720 dx_state.core_mask = BIT(core_idx);
721 if (on)
722 dx_state.dx_mask = BIT(core_idx);
723 else
724 dx_state.dx_mask = 0;
725
726 msg.primary = SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_SET_DX);
727 msg.primary |= SOF_IPC4_MSG_DIR(SOF_IPC4_MSG_REQUEST);
728 msg.primary |= SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG);
729 msg.extension = 0;
730 msg.data_ptr = &dx_state;
731 msg.data_size = sizeof(dx_state);
732
733 return sof_ipc4_tx_msg(sdev, &msg, msg.data_size, NULL, 0, false);
734 }
735
736 /*
737 * The context save callback is used to send a message to the firmware notifying
738 * it that the primary core is going to be turned off, which is used as an
739 * indication to prepare for a full power down, thus preparing for IMR boot
740 * (when supported)
741 *
742 * Note: in IPC4 there is no message used to restore context, thus no context
743 * restore callback is implemented
744 */
745 static int sof_ipc4_ctx_save(struct snd_sof_dev *sdev)
746 {
747 return sof_ipc4_set_core_state(sdev, SOF_DSP_PRIMARY_CORE, false);
748 }
749
750 static int sof_ipc4_set_pm_gate(struct snd_sof_dev *sdev, u32 flags)
751 {
752 struct sof_ipc4_msg msg = {{0}};
753
754 msg.primary = SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_SET_D0IX);
755 msg.primary |= SOF_IPC4_MSG_DIR(SOF_IPC4_MSG_REQUEST);
756 msg.primary |= SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG);
757 msg.extension = flags;
758
759 return sof_ipc4_tx_msg(sdev, &msg, 0, NULL, 0, true);
760 }
761
762 static const struct sof_ipc_pm_ops ipc4_pm_ops = {
763 .ctx_save = sof_ipc4_ctx_save,
764 .set_core_state = sof_ipc4_set_core_state,
765 .set_pm_gate = sof_ipc4_set_pm_gate,
766 };
767
768 static int sof_ipc4_init(struct snd_sof_dev *sdev)
769 {
770 struct sof_ipc4_fw_data *ipc4_data = sdev->private;
771 int inbox_offset;
772
773 mutex_init(&ipc4_data->pipeline_state_mutex);
774
775 xa_init_flags(&ipc4_data->fw_lib_xa, XA_FLAGS_ALLOC);
776
777 /* Set up the windows for IPC communication */
778 inbox_offset = snd_sof_dsp_get_mailbox_offset(sdev);
779 if (inbox_offset < 0) {
780 dev_err(sdev->dev, "%s: No mailbox offset\n", __func__);
781 return inbox_offset;
782 }
783
784 sdev->dsp_box.offset = inbox_offset;
785 sdev->dsp_box.size = SOF_IPC4_MSG_MAX_SIZE;
786 sdev->host_box.offset = snd_sof_dsp_get_window_offset(sdev,
787 SOF_IPC4_OUTBOX_WINDOW_IDX);
788 sdev->host_box.size = SOF_IPC4_MSG_MAX_SIZE;
789
790 sdev->debug_box.offset = snd_sof_dsp_get_window_offset(sdev,
791 SOF_IPC4_DEBUG_WINDOW_IDX);
792
793 sdev->fw_info_box.offset = snd_sof_dsp_get_window_offset(sdev,
794 SOF_IPC4_INBOX_WINDOW_IDX);
795 sdev->fw_info_box.size = sizeof(struct sof_ipc4_fw_registers);
796
797 dev_dbg(sdev->dev, "mailbox upstream %#x - size %#x\n",
798 sdev->dsp_box.offset, SOF_IPC4_MSG_MAX_SIZE);
799 dev_dbg(sdev->dev, "mailbox downstream %#x - size %#x\n",
800 sdev->host_box.offset, SOF_IPC4_MSG_MAX_SIZE);
801 dev_dbg(sdev->dev, "debug box %#x\n", sdev->debug_box.offset);
802
803 return 0;
804 }
805
806 static void sof_ipc4_exit(struct snd_sof_dev *sdev)
807 {
808 struct sof_ipc4_fw_data *ipc4_data = sdev->private;
809 struct sof_ipc4_fw_library *fw_lib;
810 unsigned long lib_id;
811
812 xa_for_each(&ipc4_data->fw_lib_xa, lib_id, fw_lib) {
813 /*
814 * The basefw (ID == 0) is handled by generic code, it is not
815 * loaded by IPC4 code.
816 */
817 if (lib_id != 0)
818 release_firmware(fw_lib->sof_fw.fw);
819
820 fw_lib->sof_fw.fw = NULL;
821 }
822
823 xa_destroy(&ipc4_data->fw_lib_xa);
824 }
825
826 static int sof_ipc4_post_boot(struct snd_sof_dev *sdev)
827 {
828 if (sdev->first_boot)
829 return sof_ipc4_query_fw_configuration(sdev);
830
831 return sof_ipc4_reload_fw_libraries(sdev);
832 }
833
834 const struct sof_ipc_ops ipc4_ops = {
835 .init = sof_ipc4_init,
836 .exit = sof_ipc4_exit,
837 .post_fw_boot = sof_ipc4_post_boot,
838 .tx_msg = sof_ipc4_tx_msg,
839 .rx_msg = sof_ipc4_rx_msg,
840 .set_get_data = sof_ipc4_set_get_data,
841 .get_reply = sof_ipc4_get_reply,
842 .pm = &ipc4_pm_ops,
843 .fw_loader = &ipc4_loader_ops,
844 .tplg = &ipc4_tplg_ops,
845 .pcm = &ipc4_pcm_ops,
846 .fw_tracing = &ipc4_mtrace_ops,
847 };
848
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