1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * tegra210_mvc.h - Definitions for Tegra210 MVC driver
4 *
5 * Copyright (c) 2021 NVIDIA CORPORATION. All rights reserved.
6 *
7 */
8
9 #ifndef __TEGRA210_MVC_H__
10 #define __TEGRA210_MVC_H__
11
12 /*
13 * MVC_RX registers are with respect to XBAR.
14 * The data comes from XBAR to MVC.
15 */
16 #define TEGRA210_MVC_RX_STATUS 0x0c
17 #define TEGRA210_MVC_RX_INT_STATUS 0x10
18 #define TEGRA210_MVC_RX_INT_MASK 0x14
19 #define TEGRA210_MVC_RX_INT_SET 0x18
20 #define TEGRA210_MVC_RX_INT_CLEAR 0x1c
21 #define TEGRA210_MVC_RX_CIF_CTRL 0x20
22
23 /*
24 * MVC_TX registers are with respect to XBAR.
25 * The data goes out of MVC.
26 */
27 #define TEGRA210_MVC_TX_STATUS 0x4c
28 #define TEGRA210_MVC_TX_INT_STATUS 0x50
29 #define TEGRA210_MVC_TX_INT_MASK 0x54
30 #define TEGRA210_MVC_TX_INT_SET 0x58
31 #define TEGRA210_MVC_TX_INT_CLEAR 0x5c
32 #define TEGRA210_MVC_TX_CIF_CTRL 0x60
33
34 /* Register offsets from TEGRA210_MVC*_BASE */
35 #define TEGRA210_MVC_ENABLE 0x80
36 #define TEGRA210_MVC_SOFT_RESET 0x84
37 #define TEGRA210_MVC_CG 0x88
38 #define TEGRA210_MVC_STATUS 0x90
39 #define TEGRA210_MVC_INT_STATUS 0x94
40 #define TEGRA210_MVC_CTRL 0xa8
41 #define TEGRA210_MVC_SWITCH 0xac
42 #define TEGRA210_MVC_INIT_VOL 0xb0
43 #define TEGRA210_MVC_TARGET_VOL 0xd0
44 #define TEGRA210_MVC_DURATION 0xf0
45 #define TEGRA210_MVC_DURATION_INV 0xf4
46 #define TEGRA210_MVC_POLY_N1 0xf8
47 #define TEGRA210_MVC_POLY_N2 0xfc
48 #define TEGRA210_MVC_PEAK_CTRL 0x100
49 #define TEGRA210_MVC_CFG_RAM_CTRL 0x104
50 #define TEGRA210_MVC_CFG_RAM_DATA 0x108
51 #define TEGRA210_MVC_PEAK_VALUE 0x10c
52 #define TEGRA210_MVC_CONFIG_ERR_TYPE 0x12c
53
54 /* Fields in TEGRA210_MVC_ENABLE */
55 #define TEGRA210_MVC_EN_SHIFT 0
56 #define TEGRA210_MVC_EN (1 << TEGRA210_MVC_EN_SHIFT)
57
58 #define TEGRA210_MVC_MUTE_SHIFT 8
59 #define TEGRA210_MUTE_MASK_EN 0xff
60 #define TEGRA210_MVC_MUTE_MASK (TEGRA210_MUTE_MASK_EN << TEGRA210_MVC_MUTE_SHIFT)
61 #define TEGRA210_MVC_MUTE_EN (TEGRA210_MUTE_MASK_EN << TEGRA210_MVC_MUTE_SHIFT)
62 #define TEGRA210_MVC_CH0_MUTE_EN 1
63
64 #define TEGRA210_MVC_PER_CHAN_CTRL_EN_SHIFT 30
65 #define TEGRA210_MVC_PER_CHAN_CTRL_EN_MASK (1 << TEGRA210_MVC_PER_CHAN_CTRL_EN_SHIFT)
66 #define TEGRA210_MVC_PER_CHAN_CTRL_EN (1 << TEGRA210_MVC_PER_CHAN_CTRL_EN_SHIFT)
67
68 #define TEGRA210_MVC_CURVE_TYPE_SHIFT 1
69 #define TEGRA210_MVC_CURVE_TYPE_MASK (1 << TEGRA210_MVC_CURVE_TYPE_SHIFT)
70
71 #define TEGRA210_MVC_VOLUME_SWITCH_SHIFT 2
72 #define TEGRA210_MVC_VOLUME_SWITCH_MASK (1 << TEGRA210_MVC_VOLUME_SWITCH_SHIFT)
73 #define TEGRA210_MVC_VOLUME_SWITCH_TRIGGER (1 << TEGRA210_MVC_VOLUME_SWITCH_SHIFT)
74 #define TEGRA210_MVC_CTRL_DEFAULT 0x40000003
75
76 #define TEGRA210_MVC_INIT_VOL_DEFAULT_POLY 0x01000000
77 #define TEGRA210_MVC_INIT_VOL_DEFAULT_LINEAR 0x00000000
78
79 /* Fields in TEGRA210_MVC ram ctrl */
80 #define TEGRA210_MVC_CFG_RAM_CTRL_RW_SHIFT 14
81 #define TEGRA210_MVC_CFG_RAM_CTRL_RW_WRITE (1 << TEGRA210_MVC_CFG_RAM_CTRL_RW_SHIFT)
82
83 #define TEGRA210_MVC_CFG_RAM_CTRL_ADDR_INIT_EN_SHIFT 13
84 #define TEGRA210_MVC_CFG_RAM_CTRL_ADDR_INIT_EN (1 << TEGRA210_MVC_CFG_RAM_CTRL_ADDR_INIT_EN_SHIFT)
85
86 #define TEGRA210_MVC_CFG_RAM_CTRL_SEQ_ACCESS_EN_SHIFT 12
87 #define TEGRA210_MVC_CFG_RAM_CTRL_SEQ_ACCESS_EN (1 << TEGRA210_MVC_CFG_RAM_CTRL_SEQ_ACCESS_EN_SHIFT)
88
89 #define TEGRA210_MVC_CFG_RAM_CTRL_ADDR_SHIFT 0
90 #define TEGRA210_MVC_CFG_RAM_CTRL_ADDR_MASK (0x1ff << TEGRA210_MVC_CFG_RAM_CTRL_ADDR_SHIFT)
91
92 #define REG_SIZE 4
93 #define TEGRA210_MVC_MAX_CHAN_COUNT 8
94 #define TEGRA210_MVC_REG_OFFSET(reg, i) (reg + (REG_SIZE * i))
95
96 #define TEGRA210_MVC_GET_CHAN(reg, base) (((reg) - (base)) / REG_SIZE)
97
98 #define TEGRA210_GET_MUTE_VAL(val) (((val) >> TEGRA210_MVC_MUTE_SHIFT) & TEGRA210_MUTE_MASK_EN)
99
100 #define NUM_GAIN_POLY_COEFFS 9
101
102 enum {
103 CURVE_POLY,
104 CURVE_LINEAR,
105 };
106
107 struct tegra210_mvc_gain_params {
108 int poly_coeff[NUM_GAIN_POLY_COEFFS];
109 int poly_n1;
110 int poly_n2;
111 int duration;
112 int duration_inv;
113 };
114
115 struct tegra210_mvc {
116 int volume[TEGRA210_MVC_MAX_CHAN_COUNT];
117 unsigned int curve_type;
118 unsigned int ctrl_value;
119 struct regmap *regmap;
120 };
121
122 #endif
123
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