1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Driver for CS4231 sound chips found on Sparcs.
4 * Copyright (C) 2002, 2008 David S. Miller <davem@davemloft.net>
5 *
6 * Based entirely upon drivers/sbus/audio/cs4231.c which is:
7 * Copyright (C) 1996, 1997, 1998 Derrick J Brashear (shadow@andrew.cmu.edu)
8 * and also sound/isa/cs423x/cs4231_lib.c which is:
9 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
10 */
11
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/delay.h>
15 #include <linux/init.h>
16 #include <linux/interrupt.h>
17 #include <linux/moduleparam.h>
18 #include <linux/irq.h>
19 #include <linux/io.h>
20 #include <linux/of.h>
21 #include <linux/platform_device.h>
22
23 #include <sound/core.h>
24 #include <sound/pcm.h>
25 #include <sound/info.h>
26 #include <sound/control.h>
27 #include <sound/timer.h>
28 #include <sound/initval.h>
29 #include <sound/pcm_params.h>
30
31 #ifdef CONFIG_SBUS
32 #define SBUS_SUPPORT
33 #endif
34
35 #if defined(CONFIG_PCI) && defined(CONFIG_SPARC64)
36 #define EBUS_SUPPORT
37 #include <linux/pci.h>
38 #include <asm/ebus_dma.h>
39 #endif
40
41 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
42 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
43 /* Enable this card */
44 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
45
46 module_param_array(index, int, NULL, 0444);
47 MODULE_PARM_DESC(index, "Index value for Sun CS4231 soundcard.");
48 module_param_array(id, charp, NULL, 0444);
49 MODULE_PARM_DESC(id, "ID string for Sun CS4231 soundcard.");
50 module_param_array(enable, bool, NULL, 0444);
51 MODULE_PARM_DESC(enable, "Enable Sun CS4231 soundcard.");
52 MODULE_AUTHOR("Jaroslav Kysela, Derrick J. Brashear and David S. Miller");
53 MODULE_DESCRIPTION("Sun CS4231");
54 MODULE_LICENSE("GPL");
55
56 #ifdef SBUS_SUPPORT
57 struct sbus_dma_info {
58 spinlock_t lock; /* DMA access lock */
59 int dir;
60 void __iomem *regs;
61 };
62 #endif
63
64 struct snd_cs4231;
65 struct cs4231_dma_control {
66 void (*prepare)(struct cs4231_dma_control *dma_cont,
67 int dir);
68 void (*enable)(struct cs4231_dma_control *dma_cont, int on);
69 int (*request)(struct cs4231_dma_control *dma_cont,
70 dma_addr_t bus_addr, size_t len);
71 unsigned int (*address)(struct cs4231_dma_control *dma_cont);
72 #ifdef EBUS_SUPPORT
73 struct ebus_dma_info ebus_info;
74 #endif
75 #ifdef SBUS_SUPPORT
76 struct sbus_dma_info sbus_info;
77 #endif
78 };
79
80 struct snd_cs4231 {
81 spinlock_t lock; /* registers access lock */
82 void __iomem *port;
83
84 struct cs4231_dma_control p_dma;
85 struct cs4231_dma_control c_dma;
86
87 u32 flags;
88 #define CS4231_FLAG_EBUS 0x00000001
89 #define CS4231_FLAG_PLAYBACK 0x00000002
90 #define CS4231_FLAG_CAPTURE 0x00000004
91
92 struct snd_card *card;
93 struct snd_pcm *pcm;
94 struct snd_pcm_substream *playback_substream;
95 unsigned int p_periods_sent;
96 struct snd_pcm_substream *capture_substream;
97 unsigned int c_periods_sent;
98 struct snd_timer *timer;
99
100 unsigned short mode;
101 #define CS4231_MODE_NONE 0x0000
102 #define CS4231_MODE_PLAY 0x0001
103 #define CS4231_MODE_RECORD 0x0002
104 #define CS4231_MODE_TIMER 0x0004
105 #define CS4231_MODE_OPEN (CS4231_MODE_PLAY | CS4231_MODE_RECORD | \
106 CS4231_MODE_TIMER)
107
108 unsigned char image[32]; /* registers image */
109 int mce_bit;
110 int calibrate_mute;
111 struct mutex mce_mutex; /* mutex for mce register */
112 struct mutex open_mutex; /* mutex for ALSA open/close */
113
114 struct platform_device *op;
115 unsigned int irq[2];
116 unsigned int regs_size;
117 struct snd_cs4231 *next;
118 };
119
120 /* Eventually we can use sound/isa/cs423x/cs4231_lib.c directly, but for
121 * now.... -DaveM
122 */
123
124 /* IO ports */
125 #include <sound/cs4231-regs.h>
126
127 /* XXX offsets are different than PC ISA chips... */
128 #define CS4231U(chip, x) ((chip)->port + ((c_d_c_CS4231##x) << 2))
129
130 /* SBUS DMA register defines. */
131
132 #define APCCSR 0x10UL /* APC DMA CSR */
133 #define APCCVA 0x20UL /* APC Capture DMA Address */
134 #define APCCC 0x24UL /* APC Capture Count */
135 #define APCCNVA 0x28UL /* APC Capture DMA Next Address */
136 #define APCCNC 0x2cUL /* APC Capture Next Count */
137 #define APCPVA 0x30UL /* APC Play DMA Address */
138 #define APCPC 0x34UL /* APC Play Count */
139 #define APCPNVA 0x38UL /* APC Play DMA Next Address */
140 #define APCPNC 0x3cUL /* APC Play Next Count */
141
142 /* Defines for SBUS DMA-routines */
143
144 #define APCVA 0x0UL /* APC DMA Address */
145 #define APCC 0x4UL /* APC Count */
146 #define APCNVA 0x8UL /* APC DMA Next Address */
147 #define APCNC 0xcUL /* APC Next Count */
148 #define APC_PLAY 0x30UL /* Play registers start at 0x30 */
149 #define APC_RECORD 0x20UL /* Record registers start at 0x20 */
150
151 /* APCCSR bits */
152
153 #define APC_INT_PENDING 0x800000 /* Interrupt Pending */
154 #define APC_PLAY_INT 0x400000 /* Playback interrupt */
155 #define APC_CAPT_INT 0x200000 /* Capture interrupt */
156 #define APC_GENL_INT 0x100000 /* General interrupt */
157 #define APC_XINT_ENA 0x80000 /* General ext int. enable */
158 #define APC_XINT_PLAY 0x40000 /* Playback ext intr */
159 #define APC_XINT_CAPT 0x20000 /* Capture ext intr */
160 #define APC_XINT_GENL 0x10000 /* Error ext intr */
161 #define APC_XINT_EMPT 0x8000 /* Pipe empty interrupt (0 write to pva) */
162 #define APC_XINT_PEMP 0x4000 /* Play pipe empty (pva and pnva not set) */
163 #define APC_XINT_PNVA 0x2000 /* Playback NVA dirty */
164 #define APC_XINT_PENA 0x1000 /* play pipe empty Int enable */
165 #define APC_XINT_COVF 0x800 /* Cap data dropped on floor */
166 #define APC_XINT_CNVA 0x400 /* Capture NVA dirty */
167 #define APC_XINT_CEMP 0x200 /* Capture pipe empty (cva and cnva not set) */
168 #define APC_XINT_CENA 0x100 /* Cap. pipe empty int enable */
169 #define APC_PPAUSE 0x80 /* Pause the play DMA */
170 #define APC_CPAUSE 0x40 /* Pause the capture DMA */
171 #define APC_CDC_RESET 0x20 /* CODEC RESET */
172 #define APC_PDMA_READY 0x08 /* Play DMA Go */
173 #define APC_CDMA_READY 0x04 /* Capture DMA Go */
174 #define APC_CHIP_RESET 0x01 /* Reset the chip */
175
176 /* EBUS DMA register offsets */
177
178 #define EBDMA_CSR 0x00UL /* Control/Status */
179 #define EBDMA_ADDR 0x04UL /* DMA Address */
180 #define EBDMA_COUNT 0x08UL /* DMA Count */
181
182 /*
183 * Some variables
184 */
185
186 static const unsigned char freq_bits[14] = {
187 /* 5510 */ 0x00 | CS4231_XTAL2,
188 /* 6620 */ 0x0E | CS4231_XTAL2,
189 /* 8000 */ 0x00 | CS4231_XTAL1,
190 /* 9600 */ 0x0E | CS4231_XTAL1,
191 /* 11025 */ 0x02 | CS4231_XTAL2,
192 /* 16000 */ 0x02 | CS4231_XTAL1,
193 /* 18900 */ 0x04 | CS4231_XTAL2,
194 /* 22050 */ 0x06 | CS4231_XTAL2,
195 /* 27042 */ 0x04 | CS4231_XTAL1,
196 /* 32000 */ 0x06 | CS4231_XTAL1,
197 /* 33075 */ 0x0C | CS4231_XTAL2,
198 /* 37800 */ 0x08 | CS4231_XTAL2,
199 /* 44100 */ 0x0A | CS4231_XTAL2,
200 /* 48000 */ 0x0C | CS4231_XTAL1
201 };
202
203 static const unsigned int rates[14] = {
204 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
205 27042, 32000, 33075, 37800, 44100, 48000
206 };
207
208 static const struct snd_pcm_hw_constraint_list hw_constraints_rates = {
209 .count = ARRAY_SIZE(rates),
210 .list = rates,
211 };
212
213 static int snd_cs4231_xrate(struct snd_pcm_runtime *runtime)
214 {
215 return snd_pcm_hw_constraint_list(runtime, 0,
216 SNDRV_PCM_HW_PARAM_RATE,
217 &hw_constraints_rates);
218 }
219
220 static const unsigned char snd_cs4231_original_image[32] =
221 {
222 0x00, /* 00/00 - lic */
223 0x00, /* 01/01 - ric */
224 0x9f, /* 02/02 - la1ic */
225 0x9f, /* 03/03 - ra1ic */
226 0x9f, /* 04/04 - la2ic */
227 0x9f, /* 05/05 - ra2ic */
228 0xbf, /* 06/06 - loc */
229 0xbf, /* 07/07 - roc */
230 0x20, /* 08/08 - pdfr */
231 CS4231_AUTOCALIB, /* 09/09 - ic */
232 0x00, /* 0a/10 - pc */
233 0x00, /* 0b/11 - ti */
234 CS4231_MODE2, /* 0c/12 - mi */
235 0x00, /* 0d/13 - lbc */
236 0x00, /* 0e/14 - pbru */
237 0x00, /* 0f/15 - pbrl */
238 0x80, /* 10/16 - afei */
239 0x01, /* 11/17 - afeii */
240 0x9f, /* 12/18 - llic */
241 0x9f, /* 13/19 - rlic */
242 0x00, /* 14/20 - tlb */
243 0x00, /* 15/21 - thb */
244 0x00, /* 16/22 - la3mic/reserved */
245 0x00, /* 17/23 - ra3mic/reserved */
246 0x00, /* 18/24 - afs */
247 0x00, /* 19/25 - lamoc/version */
248 0x00, /* 1a/26 - mioc */
249 0x00, /* 1b/27 - ramoc/reserved */
250 0x20, /* 1c/28 - cdfr */
251 0x00, /* 1d/29 - res4 */
252 0x00, /* 1e/30 - cbru */
253 0x00, /* 1f/31 - cbrl */
254 };
255
256 static u8 __cs4231_readb(struct snd_cs4231 *cp, void __iomem *reg_addr)
257 {
258 if (cp->flags & CS4231_FLAG_EBUS)
259 return readb(reg_addr);
260 else
261 return sbus_readb(reg_addr);
262 }
263
264 static void __cs4231_writeb(struct snd_cs4231 *cp, u8 val,
265 void __iomem *reg_addr)
266 {
267 if (cp->flags & CS4231_FLAG_EBUS)
268 return writeb(val, reg_addr);
269 else
270 return sbus_writeb(val, reg_addr);
271 }
272
273 /*
274 * Basic I/O functions
275 */
276
277 static void snd_cs4231_ready(struct snd_cs4231 *chip)
278 {
279 int timeout;
280
281 for (timeout = 250; timeout > 0; timeout--) {
282 int val = __cs4231_readb(chip, CS4231U(chip, REGSEL));
283 if ((val & CS4231_INIT) == 0)
284 break;
285 udelay(100);
286 }
287 }
288
289 static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg,
290 unsigned char value)
291 {
292 snd_cs4231_ready(chip);
293 #ifdef CONFIG_SND_DEBUG
294 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
295 snd_printdd("out: auto calibration time out - reg = 0x%x, "
296 "value = 0x%x\n",
297 reg, value);
298 #endif
299 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL));
300 wmb();
301 __cs4231_writeb(chip, value, CS4231U(chip, REG));
302 mb();
303 }
304
305 static inline void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg,
306 unsigned char mask, unsigned char value)
307 {
308 unsigned char tmp = (chip->image[reg] & mask) | value;
309
310 chip->image[reg] = tmp;
311 if (!chip->calibrate_mute)
312 snd_cs4231_dout(chip, reg, tmp);
313 }
314
315 static void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg,
316 unsigned char value)
317 {
318 snd_cs4231_dout(chip, reg, value);
319 chip->image[reg] = value;
320 mb();
321 }
322
323 static unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg)
324 {
325 snd_cs4231_ready(chip);
326 #ifdef CONFIG_SND_DEBUG
327 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
328 snd_printdd("in: auto calibration time out - reg = 0x%x\n",
329 reg);
330 #endif
331 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL));
332 mb();
333 return __cs4231_readb(chip, CS4231U(chip, REG));
334 }
335
336 /*
337 * CS4231 detection / MCE routines
338 */
339
340 static void snd_cs4231_busy_wait(struct snd_cs4231 *chip)
341 {
342 int timeout;
343
344 /* looks like this sequence is proper for CS4231A chip (GUS MAX) */
345 for (timeout = 5; timeout > 0; timeout--)
346 __cs4231_readb(chip, CS4231U(chip, REGSEL));
347
348 /* end of cleanup sequence */
349 for (timeout = 500; timeout > 0; timeout--) {
350 int val = __cs4231_readb(chip, CS4231U(chip, REGSEL));
351 if ((val & CS4231_INIT) == 0)
352 break;
353 msleep(1);
354 }
355 }
356
357 static void snd_cs4231_mce_up(struct snd_cs4231 *chip)
358 {
359 unsigned long flags;
360 int timeout;
361
362 spin_lock_irqsave(&chip->lock, flags);
363 snd_cs4231_ready(chip);
364 #ifdef CONFIG_SND_DEBUG
365 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
366 snd_printdd("mce_up - auto calibration time out (0)\n");
367 #endif
368 chip->mce_bit |= CS4231_MCE;
369 timeout = __cs4231_readb(chip, CS4231U(chip, REGSEL));
370 if (timeout == 0x80)
371 snd_printdd("mce_up [%p]: serious init problem - "
372 "codec still busy\n",
373 chip->port);
374 if (!(timeout & CS4231_MCE))
375 __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f),
376 CS4231U(chip, REGSEL));
377 spin_unlock_irqrestore(&chip->lock, flags);
378 }
379
380 static void snd_cs4231_mce_down(struct snd_cs4231 *chip)
381 {
382 unsigned long flags, timeout;
383 int reg;
384
385 snd_cs4231_busy_wait(chip);
386 spin_lock_irqsave(&chip->lock, flags);
387 #ifdef CONFIG_SND_DEBUG
388 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
389 snd_printdd("mce_down [%p] - auto calibration time out (0)\n",
390 CS4231U(chip, REGSEL));
391 #endif
392 chip->mce_bit &= ~CS4231_MCE;
393 reg = __cs4231_readb(chip, CS4231U(chip, REGSEL));
394 __cs4231_writeb(chip, chip->mce_bit | (reg & 0x1f),
395 CS4231U(chip, REGSEL));
396 if (reg == 0x80)
397 snd_printdd("mce_down [%p]: serious init problem "
398 "- codec still busy\n", chip->port);
399 if ((reg & CS4231_MCE) == 0) {
400 spin_unlock_irqrestore(&chip->lock, flags);
401 return;
402 }
403
404 /*
405 * Wait for auto-calibration (AC) process to finish, i.e. ACI to go low.
406 */
407 timeout = jiffies + msecs_to_jiffies(250);
408 do {
409 spin_unlock_irqrestore(&chip->lock, flags);
410 msleep(1);
411 spin_lock_irqsave(&chip->lock, flags);
412 reg = snd_cs4231_in(chip, CS4231_TEST_INIT);
413 reg &= CS4231_CALIB_IN_PROGRESS;
414 } while (reg && time_before(jiffies, timeout));
415 spin_unlock_irqrestore(&chip->lock, flags);
416
417 if (reg)
418 snd_printk(KERN_ERR
419 "mce_down - auto calibration time out (2)\n");
420 }
421
422 static void snd_cs4231_advance_dma(struct cs4231_dma_control *dma_cont,
423 struct snd_pcm_substream *substream,
424 unsigned int *periods_sent)
425 {
426 struct snd_pcm_runtime *runtime = substream->runtime;
427
428 while (1) {
429 unsigned int period_size = snd_pcm_lib_period_bytes(substream);
430 unsigned int offset = period_size * (*periods_sent);
431
432 if (WARN_ON(period_size >= (1 << 24)))
433 return;
434
435 if (dma_cont->request(dma_cont,
436 runtime->dma_addr + offset, period_size))
437 return;
438 (*periods_sent) = ((*periods_sent) + 1) % runtime->periods;
439 }
440 }
441
442 static void cs4231_dma_trigger(struct snd_pcm_substream *substream,
443 unsigned int what, int on)
444 {
445 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
446 struct cs4231_dma_control *dma_cont;
447
448 if (what & CS4231_PLAYBACK_ENABLE) {
449 dma_cont = &chip->p_dma;
450 if (on) {
451 dma_cont->prepare(dma_cont, 0);
452 dma_cont->enable(dma_cont, 1);
453 snd_cs4231_advance_dma(dma_cont,
454 chip->playback_substream,
455 &chip->p_periods_sent);
456 } else {
457 dma_cont->enable(dma_cont, 0);
458 }
459 }
460 if (what & CS4231_RECORD_ENABLE) {
461 dma_cont = &chip->c_dma;
462 if (on) {
463 dma_cont->prepare(dma_cont, 1);
464 dma_cont->enable(dma_cont, 1);
465 snd_cs4231_advance_dma(dma_cont,
466 chip->capture_substream,
467 &chip->c_periods_sent);
468 } else {
469 dma_cont->enable(dma_cont, 0);
470 }
471 }
472 }
473
474 static int snd_cs4231_trigger(struct snd_pcm_substream *substream, int cmd)
475 {
476 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
477 int result = 0;
478
479 switch (cmd) {
480 case SNDRV_PCM_TRIGGER_START:
481 case SNDRV_PCM_TRIGGER_STOP:
482 {
483 unsigned int what = 0;
484 struct snd_pcm_substream *s;
485 unsigned long flags;
486
487 snd_pcm_group_for_each_entry(s, substream) {
488 if (s == chip->playback_substream) {
489 what |= CS4231_PLAYBACK_ENABLE;
490 snd_pcm_trigger_done(s, substream);
491 } else if (s == chip->capture_substream) {
492 what |= CS4231_RECORD_ENABLE;
493 snd_pcm_trigger_done(s, substream);
494 }
495 }
496
497 spin_lock_irqsave(&chip->lock, flags);
498 if (cmd == SNDRV_PCM_TRIGGER_START) {
499 cs4231_dma_trigger(substream, what, 1);
500 chip->image[CS4231_IFACE_CTRL] |= what;
501 } else {
502 cs4231_dma_trigger(substream, what, 0);
503 chip->image[CS4231_IFACE_CTRL] &= ~what;
504 }
505 snd_cs4231_out(chip, CS4231_IFACE_CTRL,
506 chip->image[CS4231_IFACE_CTRL]);
507 spin_unlock_irqrestore(&chip->lock, flags);
508 break;
509 }
510 default:
511 result = -EINVAL;
512 break;
513 }
514
515 return result;
516 }
517
518 /*
519 * CODEC I/O
520 */
521
522 static unsigned char snd_cs4231_get_rate(unsigned int rate)
523 {
524 int i;
525
526 for (i = 0; i < 14; i++)
527 if (rate == rates[i])
528 return freq_bits[i];
529
530 return freq_bits[13];
531 }
532
533 static unsigned char snd_cs4231_get_format(struct snd_cs4231 *chip, int format,
534 int channels)
535 {
536 unsigned char rformat;
537
538 rformat = CS4231_LINEAR_8;
539 switch (format) {
540 case SNDRV_PCM_FORMAT_MU_LAW:
541 rformat = CS4231_ULAW_8;
542 break;
543 case SNDRV_PCM_FORMAT_A_LAW:
544 rformat = CS4231_ALAW_8;
545 break;
546 case SNDRV_PCM_FORMAT_S16_LE:
547 rformat = CS4231_LINEAR_16;
548 break;
549 case SNDRV_PCM_FORMAT_S16_BE:
550 rformat = CS4231_LINEAR_16_BIG;
551 break;
552 case SNDRV_PCM_FORMAT_IMA_ADPCM:
553 rformat = CS4231_ADPCM_16;
554 break;
555 }
556 if (channels > 1)
557 rformat |= CS4231_STEREO;
558 return rformat;
559 }
560
561 static void snd_cs4231_calibrate_mute(struct snd_cs4231 *chip, int mute)
562 {
563 unsigned long flags;
564
565 mute = mute ? 1 : 0;
566 spin_lock_irqsave(&chip->lock, flags);
567 if (chip->calibrate_mute == mute) {
568 spin_unlock_irqrestore(&chip->lock, flags);
569 return;
570 }
571 if (!mute) {
572 snd_cs4231_dout(chip, CS4231_LEFT_INPUT,
573 chip->image[CS4231_LEFT_INPUT]);
574 snd_cs4231_dout(chip, CS4231_RIGHT_INPUT,
575 chip->image[CS4231_RIGHT_INPUT]);
576 snd_cs4231_dout(chip, CS4231_LOOPBACK,
577 chip->image[CS4231_LOOPBACK]);
578 }
579 snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT,
580 mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]);
581 snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT,
582 mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]);
583 snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT,
584 mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]);
585 snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT,
586 mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]);
587 snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT,
588 mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]);
589 snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT,
590 mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]);
591 snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN,
592 mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]);
593 snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN,
594 mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]);
595 snd_cs4231_dout(chip, CS4231_MONO_CTRL,
596 mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
597 chip->calibrate_mute = mute;
598 spin_unlock_irqrestore(&chip->lock, flags);
599 }
600
601 static void snd_cs4231_playback_format(struct snd_cs4231 *chip,
602 struct snd_pcm_hw_params *params,
603 unsigned char pdfr)
604 {
605 unsigned long flags;
606
607 mutex_lock(&chip->mce_mutex);
608 snd_cs4231_calibrate_mute(chip, 1);
609
610 snd_cs4231_mce_up(chip);
611
612 spin_lock_irqsave(&chip->lock, flags);
613 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
614 (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ?
615 (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) :
616 pdfr);
617 spin_unlock_irqrestore(&chip->lock, flags);
618
619 snd_cs4231_mce_down(chip);
620
621 snd_cs4231_calibrate_mute(chip, 0);
622 mutex_unlock(&chip->mce_mutex);
623 }
624
625 static void snd_cs4231_capture_format(struct snd_cs4231 *chip,
626 struct snd_pcm_hw_params *params,
627 unsigned char cdfr)
628 {
629 unsigned long flags;
630
631 mutex_lock(&chip->mce_mutex);
632 snd_cs4231_calibrate_mute(chip, 1);
633
634 snd_cs4231_mce_up(chip);
635
636 spin_lock_irqsave(&chip->lock, flags);
637 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
638 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
639 ((chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) |
640 (cdfr & 0x0f));
641 spin_unlock_irqrestore(&chip->lock, flags);
642 snd_cs4231_mce_down(chip);
643 snd_cs4231_mce_up(chip);
644 spin_lock_irqsave(&chip->lock, flags);
645 }
646 snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr);
647 spin_unlock_irqrestore(&chip->lock, flags);
648
649 snd_cs4231_mce_down(chip);
650
651 snd_cs4231_calibrate_mute(chip, 0);
652 mutex_unlock(&chip->mce_mutex);
653 }
654
655 /*
656 * Timer interface
657 */
658
659 static unsigned long snd_cs4231_timer_resolution(struct snd_timer *timer)
660 {
661 struct snd_cs4231 *chip = snd_timer_chip(timer);
662
663 return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
664 }
665
666 static int snd_cs4231_timer_start(struct snd_timer *timer)
667 {
668 unsigned long flags;
669 unsigned int ticks;
670 struct snd_cs4231 *chip = snd_timer_chip(timer);
671
672 spin_lock_irqsave(&chip->lock, flags);
673 ticks = timer->sticks;
674 if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
675 (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
676 (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
677 snd_cs4231_out(chip, CS4231_TIMER_HIGH,
678 chip->image[CS4231_TIMER_HIGH] =
679 (unsigned char) (ticks >> 8));
680 snd_cs4231_out(chip, CS4231_TIMER_LOW,
681 chip->image[CS4231_TIMER_LOW] =
682 (unsigned char) ticks);
683 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
684 chip->image[CS4231_ALT_FEATURE_1] |
685 CS4231_TIMER_ENABLE);
686 }
687 spin_unlock_irqrestore(&chip->lock, flags);
688
689 return 0;
690 }
691
692 static int snd_cs4231_timer_stop(struct snd_timer *timer)
693 {
694 unsigned long flags;
695 struct snd_cs4231 *chip = snd_timer_chip(timer);
696
697 spin_lock_irqsave(&chip->lock, flags);
698 chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE;
699 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
700 chip->image[CS4231_ALT_FEATURE_1]);
701 spin_unlock_irqrestore(&chip->lock, flags);
702
703 return 0;
704 }
705
706 static void snd_cs4231_init(struct snd_cs4231 *chip)
707 {
708 unsigned long flags;
709
710 snd_cs4231_mce_down(chip);
711
712 #ifdef SNDRV_DEBUG_MCE
713 snd_printdd("init: (1)\n");
714 #endif
715 snd_cs4231_mce_up(chip);
716 spin_lock_irqsave(&chip->lock, flags);
717 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
718 CS4231_PLAYBACK_PIO |
719 CS4231_RECORD_ENABLE |
720 CS4231_RECORD_PIO |
721 CS4231_CALIB_MODE);
722 chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
723 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
724 spin_unlock_irqrestore(&chip->lock, flags);
725 snd_cs4231_mce_down(chip);
726
727 #ifdef SNDRV_DEBUG_MCE
728 snd_printdd("init: (2)\n");
729 #endif
730
731 snd_cs4231_mce_up(chip);
732 spin_lock_irqsave(&chip->lock, flags);
733 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
734 chip->image[CS4231_ALT_FEATURE_1]);
735 spin_unlock_irqrestore(&chip->lock, flags);
736 snd_cs4231_mce_down(chip);
737
738 #ifdef SNDRV_DEBUG_MCE
739 snd_printdd("init: (3) - afei = 0x%x\n",
740 chip->image[CS4231_ALT_FEATURE_1]);
741 #endif
742
743 spin_lock_irqsave(&chip->lock, flags);
744 snd_cs4231_out(chip, CS4231_ALT_FEATURE_2,
745 chip->image[CS4231_ALT_FEATURE_2]);
746 spin_unlock_irqrestore(&chip->lock, flags);
747
748 snd_cs4231_mce_up(chip);
749 spin_lock_irqsave(&chip->lock, flags);
750 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
751 chip->image[CS4231_PLAYBK_FORMAT]);
752 spin_unlock_irqrestore(&chip->lock, flags);
753 snd_cs4231_mce_down(chip);
754
755 #ifdef SNDRV_DEBUG_MCE
756 snd_printdd("init: (4)\n");
757 #endif
758
759 snd_cs4231_mce_up(chip);
760 spin_lock_irqsave(&chip->lock, flags);
761 snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]);
762 spin_unlock_irqrestore(&chip->lock, flags);
763 snd_cs4231_mce_down(chip);
764
765 #ifdef SNDRV_DEBUG_MCE
766 snd_printdd("init: (5)\n");
767 #endif
768 }
769
770 static int snd_cs4231_open(struct snd_cs4231 *chip, unsigned int mode)
771 {
772 unsigned long flags;
773
774 mutex_lock(&chip->open_mutex);
775 if ((chip->mode & mode)) {
776 mutex_unlock(&chip->open_mutex);
777 return -EAGAIN;
778 }
779 if (chip->mode & CS4231_MODE_OPEN) {
780 chip->mode |= mode;
781 mutex_unlock(&chip->open_mutex);
782 return 0;
783 }
784 /* ok. now enable and ack CODEC IRQ */
785 spin_lock_irqsave(&chip->lock, flags);
786 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
787 CS4231_RECORD_IRQ |
788 CS4231_TIMER_IRQ);
789 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
790 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
791 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
792
793 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
794 CS4231_RECORD_IRQ |
795 CS4231_TIMER_IRQ);
796 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
797
798 spin_unlock_irqrestore(&chip->lock, flags);
799
800 chip->mode = mode;
801 mutex_unlock(&chip->open_mutex);
802 return 0;
803 }
804
805 static void snd_cs4231_close(struct snd_cs4231 *chip, unsigned int mode)
806 {
807 unsigned long flags;
808
809 mutex_lock(&chip->open_mutex);
810 chip->mode &= ~mode;
811 if (chip->mode & CS4231_MODE_OPEN) {
812 mutex_unlock(&chip->open_mutex);
813 return;
814 }
815 snd_cs4231_calibrate_mute(chip, 1);
816
817 /* disable IRQ */
818 spin_lock_irqsave(&chip->lock, flags);
819 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
820 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
821 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
822
823 /* now disable record & playback */
824
825 if (chip->image[CS4231_IFACE_CTRL] &
826 (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
827 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) {
828 spin_unlock_irqrestore(&chip->lock, flags);
829 snd_cs4231_mce_up(chip);
830 spin_lock_irqsave(&chip->lock, flags);
831 chip->image[CS4231_IFACE_CTRL] &=
832 ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
833 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
834 snd_cs4231_out(chip, CS4231_IFACE_CTRL,
835 chip->image[CS4231_IFACE_CTRL]);
836 spin_unlock_irqrestore(&chip->lock, flags);
837 snd_cs4231_mce_down(chip);
838 spin_lock_irqsave(&chip->lock, flags);
839 }
840
841 /* clear IRQ again */
842 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
843 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
844 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
845 spin_unlock_irqrestore(&chip->lock, flags);
846
847 snd_cs4231_calibrate_mute(chip, 0);
848
849 chip->mode = 0;
850 mutex_unlock(&chip->open_mutex);
851 }
852
853 /*
854 * timer open/close
855 */
856
857 static int snd_cs4231_timer_open(struct snd_timer *timer)
858 {
859 struct snd_cs4231 *chip = snd_timer_chip(timer);
860 snd_cs4231_open(chip, CS4231_MODE_TIMER);
861 return 0;
862 }
863
864 static int snd_cs4231_timer_close(struct snd_timer *timer)
865 {
866 struct snd_cs4231 *chip = snd_timer_chip(timer);
867 snd_cs4231_close(chip, CS4231_MODE_TIMER);
868 return 0;
869 }
870
871 static const struct snd_timer_hardware snd_cs4231_timer_table = {
872 .flags = SNDRV_TIMER_HW_AUTO,
873 .resolution = 9945,
874 .ticks = 65535,
875 .open = snd_cs4231_timer_open,
876 .close = snd_cs4231_timer_close,
877 .c_resolution = snd_cs4231_timer_resolution,
878 .start = snd_cs4231_timer_start,
879 .stop = snd_cs4231_timer_stop,
880 };
881
882 /*
883 * ok.. exported functions..
884 */
885
886 static int snd_cs4231_playback_hw_params(struct snd_pcm_substream *substream,
887 struct snd_pcm_hw_params *hw_params)
888 {
889 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
890 unsigned char new_pdfr;
891
892 new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params),
893 params_channels(hw_params)) |
894 snd_cs4231_get_rate(params_rate(hw_params));
895 snd_cs4231_playback_format(chip, hw_params, new_pdfr);
896
897 return 0;
898 }
899
900 static int snd_cs4231_playback_prepare(struct snd_pcm_substream *substream)
901 {
902 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
903 struct snd_pcm_runtime *runtime = substream->runtime;
904 unsigned long flags;
905 int ret = 0;
906
907 spin_lock_irqsave(&chip->lock, flags);
908
909 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
910 CS4231_PLAYBACK_PIO);
911
912 if (WARN_ON(runtime->period_size > 0xffff + 1)) {
913 ret = -EINVAL;
914 goto out;
915 }
916
917 chip->p_periods_sent = 0;
918
919 out:
920 spin_unlock_irqrestore(&chip->lock, flags);
921
922 return ret;
923 }
924
925 static int snd_cs4231_capture_hw_params(struct snd_pcm_substream *substream,
926 struct snd_pcm_hw_params *hw_params)
927 {
928 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
929 unsigned char new_cdfr;
930
931 new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params),
932 params_channels(hw_params)) |
933 snd_cs4231_get_rate(params_rate(hw_params));
934 snd_cs4231_capture_format(chip, hw_params, new_cdfr);
935
936 return 0;
937 }
938
939 static int snd_cs4231_capture_prepare(struct snd_pcm_substream *substream)
940 {
941 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
942 unsigned long flags;
943
944 spin_lock_irqsave(&chip->lock, flags);
945 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE |
946 CS4231_RECORD_PIO);
947
948
949 chip->c_periods_sent = 0;
950 spin_unlock_irqrestore(&chip->lock, flags);
951
952 return 0;
953 }
954
955 static void snd_cs4231_overrange(struct snd_cs4231 *chip)
956 {
957 unsigned long flags;
958 unsigned char res;
959
960 spin_lock_irqsave(&chip->lock, flags);
961 res = snd_cs4231_in(chip, CS4231_TEST_INIT);
962 spin_unlock_irqrestore(&chip->lock, flags);
963
964 /* detect overrange only above 0dB; may be user selectable? */
965 if (res & (0x08 | 0x02))
966 chip->capture_substream->runtime->overrange++;
967 }
968
969 static void snd_cs4231_play_callback(struct snd_cs4231 *chip)
970 {
971 if (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE) {
972 snd_pcm_period_elapsed(chip->playback_substream);
973 snd_cs4231_advance_dma(&chip->p_dma, chip->playback_substream,
974 &chip->p_periods_sent);
975 }
976 }
977
978 static void snd_cs4231_capture_callback(struct snd_cs4231 *chip)
979 {
980 if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) {
981 snd_pcm_period_elapsed(chip->capture_substream);
982 snd_cs4231_advance_dma(&chip->c_dma, chip->capture_substream,
983 &chip->c_periods_sent);
984 }
985 }
986
987 static snd_pcm_uframes_t snd_cs4231_playback_pointer(
988 struct snd_pcm_substream *substream)
989 {
990 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
991 struct cs4231_dma_control *dma_cont = &chip->p_dma;
992 size_t ptr;
993
994 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
995 return 0;
996 ptr = dma_cont->address(dma_cont);
997 if (ptr != 0)
998 ptr -= substream->runtime->dma_addr;
999
1000 return bytes_to_frames(substream->runtime, ptr);
1001 }
1002
1003 static snd_pcm_uframes_t snd_cs4231_capture_pointer(
1004 struct snd_pcm_substream *substream)
1005 {
1006 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1007 struct cs4231_dma_control *dma_cont = &chip->c_dma;
1008 size_t ptr;
1009
1010 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
1011 return 0;
1012 ptr = dma_cont->address(dma_cont);
1013 if (ptr != 0)
1014 ptr -= substream->runtime->dma_addr;
1015
1016 return bytes_to_frames(substream->runtime, ptr);
1017 }
1018
1019 static int snd_cs4231_probe(struct snd_cs4231 *chip)
1020 {
1021 unsigned long flags;
1022 int i;
1023 int id = 0;
1024 int vers = 0;
1025 unsigned char *ptr;
1026
1027 for (i = 0; i < 50; i++) {
1028 mb();
1029 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
1030 msleep(2);
1031 else {
1032 spin_lock_irqsave(&chip->lock, flags);
1033 snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2);
1034 id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f;
1035 vers = snd_cs4231_in(chip, CS4231_VERSION);
1036 spin_unlock_irqrestore(&chip->lock, flags);
1037 if (id == 0x0a)
1038 break; /* this is valid value */
1039 }
1040 }
1041 snd_printdd("cs4231: port = %p, id = 0x%x\n", chip->port, id);
1042 if (id != 0x0a)
1043 return -ENODEV; /* no valid device found */
1044
1045 spin_lock_irqsave(&chip->lock, flags);
1046
1047 /* clear any pendings IRQ */
1048 __cs4231_readb(chip, CS4231U(chip, STATUS));
1049 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS));
1050 mb();
1051
1052 spin_unlock_irqrestore(&chip->lock, flags);
1053
1054 chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
1055 chip->image[CS4231_IFACE_CTRL] =
1056 chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA;
1057 chip->image[CS4231_ALT_FEATURE_1] = 0x80;
1058 chip->image[CS4231_ALT_FEATURE_2] = 0x01;
1059 if (vers & 0x20)
1060 chip->image[CS4231_ALT_FEATURE_2] |= 0x02;
1061
1062 ptr = (unsigned char *) &chip->image;
1063
1064 snd_cs4231_mce_down(chip);
1065
1066 spin_lock_irqsave(&chip->lock, flags);
1067
1068 for (i = 0; i < 32; i++) /* ok.. fill all CS4231 registers */
1069 snd_cs4231_out(chip, i, *ptr++);
1070
1071 spin_unlock_irqrestore(&chip->lock, flags);
1072
1073 snd_cs4231_mce_up(chip);
1074
1075 snd_cs4231_mce_down(chip);
1076
1077 mdelay(2);
1078
1079 return 0; /* all things are ok.. */
1080 }
1081
1082 static const struct snd_pcm_hardware snd_cs4231_playback = {
1083 .info = SNDRV_PCM_INFO_MMAP |
1084 SNDRV_PCM_INFO_INTERLEAVED |
1085 SNDRV_PCM_INFO_MMAP_VALID |
1086 SNDRV_PCM_INFO_SYNC_START,
1087 .formats = SNDRV_PCM_FMTBIT_MU_LAW |
1088 SNDRV_PCM_FMTBIT_A_LAW |
1089 SNDRV_PCM_FMTBIT_IMA_ADPCM |
1090 SNDRV_PCM_FMTBIT_U8 |
1091 SNDRV_PCM_FMTBIT_S16_LE |
1092 SNDRV_PCM_FMTBIT_S16_BE,
1093 .rates = SNDRV_PCM_RATE_KNOT |
1094 SNDRV_PCM_RATE_8000_48000,
1095 .rate_min = 5510,
1096 .rate_max = 48000,
1097 .channels_min = 1,
1098 .channels_max = 2,
1099 .buffer_bytes_max = 32 * 1024,
1100 .period_bytes_min = 64,
1101 .period_bytes_max = 32 * 1024,
1102 .periods_min = 1,
1103 .periods_max = 1024,
1104 };
1105
1106 static const struct snd_pcm_hardware snd_cs4231_capture = {
1107 .info = SNDRV_PCM_INFO_MMAP |
1108 SNDRV_PCM_INFO_INTERLEAVED |
1109 SNDRV_PCM_INFO_MMAP_VALID |
1110 SNDRV_PCM_INFO_SYNC_START,
1111 .formats = SNDRV_PCM_FMTBIT_MU_LAW |
1112 SNDRV_PCM_FMTBIT_A_LAW |
1113 SNDRV_PCM_FMTBIT_IMA_ADPCM |
1114 SNDRV_PCM_FMTBIT_U8 |
1115 SNDRV_PCM_FMTBIT_S16_LE |
1116 SNDRV_PCM_FMTBIT_S16_BE,
1117 .rates = SNDRV_PCM_RATE_KNOT |
1118 SNDRV_PCM_RATE_8000_48000,
1119 .rate_min = 5510,
1120 .rate_max = 48000,
1121 .channels_min = 1,
1122 .channels_max = 2,
1123 .buffer_bytes_max = 32 * 1024,
1124 .period_bytes_min = 64,
1125 .period_bytes_max = 32 * 1024,
1126 .periods_min = 1,
1127 .periods_max = 1024,
1128 };
1129
1130 static int snd_cs4231_playback_open(struct snd_pcm_substream *substream)
1131 {
1132 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1133 struct snd_pcm_runtime *runtime = substream->runtime;
1134 int err;
1135
1136 runtime->hw = snd_cs4231_playback;
1137
1138 err = snd_cs4231_open(chip, CS4231_MODE_PLAY);
1139 if (err < 0)
1140 return err;
1141 chip->playback_substream = substream;
1142 chip->p_periods_sent = 0;
1143 snd_pcm_set_sync(substream);
1144 snd_cs4231_xrate(runtime);
1145
1146 return 0;
1147 }
1148
1149 static int snd_cs4231_capture_open(struct snd_pcm_substream *substream)
1150 {
1151 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1152 struct snd_pcm_runtime *runtime = substream->runtime;
1153 int err;
1154
1155 runtime->hw = snd_cs4231_capture;
1156
1157 err = snd_cs4231_open(chip, CS4231_MODE_RECORD);
1158 if (err < 0)
1159 return err;
1160 chip->capture_substream = substream;
1161 chip->c_periods_sent = 0;
1162 snd_pcm_set_sync(substream);
1163 snd_cs4231_xrate(runtime);
1164
1165 return 0;
1166 }
1167
1168 static int snd_cs4231_playback_close(struct snd_pcm_substream *substream)
1169 {
1170 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1171
1172 snd_cs4231_close(chip, CS4231_MODE_PLAY);
1173 chip->playback_substream = NULL;
1174
1175 return 0;
1176 }
1177
1178 static int snd_cs4231_capture_close(struct snd_pcm_substream *substream)
1179 {
1180 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1181
1182 snd_cs4231_close(chip, CS4231_MODE_RECORD);
1183 chip->capture_substream = NULL;
1184
1185 return 0;
1186 }
1187
1188 /* XXX We can do some power-management, in particular on EBUS using
1189 * XXX the audio AUXIO register...
1190 */
1191
1192 static const struct snd_pcm_ops snd_cs4231_playback_ops = {
1193 .open = snd_cs4231_playback_open,
1194 .close = snd_cs4231_playback_close,
1195 .hw_params = snd_cs4231_playback_hw_params,
1196 .prepare = snd_cs4231_playback_prepare,
1197 .trigger = snd_cs4231_trigger,
1198 .pointer = snd_cs4231_playback_pointer,
1199 };
1200
1201 static const struct snd_pcm_ops snd_cs4231_capture_ops = {
1202 .open = snd_cs4231_capture_open,
1203 .close = snd_cs4231_capture_close,
1204 .hw_params = snd_cs4231_capture_hw_params,
1205 .prepare = snd_cs4231_capture_prepare,
1206 .trigger = snd_cs4231_trigger,
1207 .pointer = snd_cs4231_capture_pointer,
1208 };
1209
1210 static int snd_cs4231_pcm(struct snd_card *card)
1211 {
1212 struct snd_cs4231 *chip = card->private_data;
1213 struct snd_pcm *pcm;
1214 int err;
1215
1216 err = snd_pcm_new(card, "CS4231", 0, 1, 1, &pcm);
1217 if (err < 0)
1218 return err;
1219
1220 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1221 &snd_cs4231_playback_ops);
1222 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
1223 &snd_cs4231_capture_ops);
1224
1225 /* global setup */
1226 pcm->private_data = chip;
1227 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1228 strcpy(pcm->name, "CS4231");
1229
1230 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
1231 &chip->op->dev, 64 * 1024, 128 * 1024);
1232
1233 chip->pcm = pcm;
1234
1235 return 0;
1236 }
1237
1238 static int snd_cs4231_timer(struct snd_card *card)
1239 {
1240 struct snd_cs4231 *chip = card->private_data;
1241 struct snd_timer *timer;
1242 struct snd_timer_id tid;
1243 int err;
1244
1245 /* Timer initialization */
1246 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1247 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1248 tid.card = card->number;
1249 tid.device = 0;
1250 tid.subdevice = 0;
1251 err = snd_timer_new(card, "CS4231", &tid, &timer);
1252 if (err < 0)
1253 return err;
1254 strcpy(timer->name, "CS4231");
1255 timer->private_data = chip;
1256 timer->hw = snd_cs4231_timer_table;
1257 chip->timer = timer;
1258
1259 return 0;
1260 }
1261
1262 /*
1263 * MIXER part
1264 */
1265
1266 static int snd_cs4231_info_mux(struct snd_kcontrol *kcontrol,
1267 struct snd_ctl_elem_info *uinfo)
1268 {
1269 static const char * const texts[4] = {
1270 "Line", "CD", "Mic", "Mix"
1271 };
1272
1273 return snd_ctl_enum_info(uinfo, 2, 4, texts);
1274 }
1275
1276 static int snd_cs4231_get_mux(struct snd_kcontrol *kcontrol,
1277 struct snd_ctl_elem_value *ucontrol)
1278 {
1279 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1280 unsigned long flags;
1281
1282 spin_lock_irqsave(&chip->lock, flags);
1283 ucontrol->value.enumerated.item[0] =
1284 (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
1285 ucontrol->value.enumerated.item[1] =
1286 (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
1287 spin_unlock_irqrestore(&chip->lock, flags);
1288
1289 return 0;
1290 }
1291
1292 static int snd_cs4231_put_mux(struct snd_kcontrol *kcontrol,
1293 struct snd_ctl_elem_value *ucontrol)
1294 {
1295 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1296 unsigned long flags;
1297 unsigned short left, right;
1298 int change;
1299
1300 if (ucontrol->value.enumerated.item[0] > 3 ||
1301 ucontrol->value.enumerated.item[1] > 3)
1302 return -EINVAL;
1303 left = ucontrol->value.enumerated.item[0] << 6;
1304 right = ucontrol->value.enumerated.item[1] << 6;
1305
1306 spin_lock_irqsave(&chip->lock, flags);
1307
1308 left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
1309 right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
1310 change = left != chip->image[CS4231_LEFT_INPUT] ||
1311 right != chip->image[CS4231_RIGHT_INPUT];
1312 snd_cs4231_out(chip, CS4231_LEFT_INPUT, left);
1313 snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right);
1314
1315 spin_unlock_irqrestore(&chip->lock, flags);
1316
1317 return change;
1318 }
1319
1320 static int snd_cs4231_info_single(struct snd_kcontrol *kcontrol,
1321 struct snd_ctl_elem_info *uinfo)
1322 {
1323 int mask = (kcontrol->private_value >> 16) & 0xff;
1324
1325 uinfo->type = (mask == 1) ?
1326 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1327 uinfo->count = 1;
1328 uinfo->value.integer.min = 0;
1329 uinfo->value.integer.max = mask;
1330
1331 return 0;
1332 }
1333
1334 static int snd_cs4231_get_single(struct snd_kcontrol *kcontrol,
1335 struct snd_ctl_elem_value *ucontrol)
1336 {
1337 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1338 unsigned long flags;
1339 int reg = kcontrol->private_value & 0xff;
1340 int shift = (kcontrol->private_value >> 8) & 0xff;
1341 int mask = (kcontrol->private_value >> 16) & 0xff;
1342 int invert = (kcontrol->private_value >> 24) & 0xff;
1343
1344 spin_lock_irqsave(&chip->lock, flags);
1345
1346 ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1347
1348 spin_unlock_irqrestore(&chip->lock, flags);
1349
1350 if (invert)
1351 ucontrol->value.integer.value[0] =
1352 (mask - ucontrol->value.integer.value[0]);
1353
1354 return 0;
1355 }
1356
1357 static int snd_cs4231_put_single(struct snd_kcontrol *kcontrol,
1358 struct snd_ctl_elem_value *ucontrol)
1359 {
1360 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1361 unsigned long flags;
1362 int reg = kcontrol->private_value & 0xff;
1363 int shift = (kcontrol->private_value >> 8) & 0xff;
1364 int mask = (kcontrol->private_value >> 16) & 0xff;
1365 int invert = (kcontrol->private_value >> 24) & 0xff;
1366 int change;
1367 unsigned short val;
1368
1369 val = (ucontrol->value.integer.value[0] & mask);
1370 if (invert)
1371 val = mask - val;
1372 val <<= shift;
1373
1374 spin_lock_irqsave(&chip->lock, flags);
1375
1376 val = (chip->image[reg] & ~(mask << shift)) | val;
1377 change = val != chip->image[reg];
1378 snd_cs4231_out(chip, reg, val);
1379
1380 spin_unlock_irqrestore(&chip->lock, flags);
1381
1382 return change;
1383 }
1384
1385 static int snd_cs4231_info_double(struct snd_kcontrol *kcontrol,
1386 struct snd_ctl_elem_info *uinfo)
1387 {
1388 int mask = (kcontrol->private_value >> 24) & 0xff;
1389
1390 uinfo->type = mask == 1 ?
1391 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1392 uinfo->count = 2;
1393 uinfo->value.integer.min = 0;
1394 uinfo->value.integer.max = mask;
1395
1396 return 0;
1397 }
1398
1399 static int snd_cs4231_get_double(struct snd_kcontrol *kcontrol,
1400 struct snd_ctl_elem_value *ucontrol)
1401 {
1402 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1403 unsigned long flags;
1404 int left_reg = kcontrol->private_value & 0xff;
1405 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1406 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1407 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1408 int mask = (kcontrol->private_value >> 24) & 0xff;
1409 int invert = (kcontrol->private_value >> 22) & 1;
1410
1411 spin_lock_irqsave(&chip->lock, flags);
1412
1413 ucontrol->value.integer.value[0] =
1414 (chip->image[left_reg] >> shift_left) & mask;
1415 ucontrol->value.integer.value[1] =
1416 (chip->image[right_reg] >> shift_right) & mask;
1417
1418 spin_unlock_irqrestore(&chip->lock, flags);
1419
1420 if (invert) {
1421 ucontrol->value.integer.value[0] =
1422 (mask - ucontrol->value.integer.value[0]);
1423 ucontrol->value.integer.value[1] =
1424 (mask - ucontrol->value.integer.value[1]);
1425 }
1426
1427 return 0;
1428 }
1429
1430 static int snd_cs4231_put_double(struct snd_kcontrol *kcontrol,
1431 struct snd_ctl_elem_value *ucontrol)
1432 {
1433 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1434 unsigned long flags;
1435 int left_reg = kcontrol->private_value & 0xff;
1436 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1437 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1438 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1439 int mask = (kcontrol->private_value >> 24) & 0xff;
1440 int invert = (kcontrol->private_value >> 22) & 1;
1441 int change;
1442 unsigned short val1, val2;
1443
1444 val1 = ucontrol->value.integer.value[0] & mask;
1445 val2 = ucontrol->value.integer.value[1] & mask;
1446 if (invert) {
1447 val1 = mask - val1;
1448 val2 = mask - val2;
1449 }
1450 val1 <<= shift_left;
1451 val2 <<= shift_right;
1452
1453 spin_lock_irqsave(&chip->lock, flags);
1454
1455 val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1456 val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
1457 change = val1 != chip->image[left_reg];
1458 change |= val2 != chip->image[right_reg];
1459 snd_cs4231_out(chip, left_reg, val1);
1460 snd_cs4231_out(chip, right_reg, val2);
1461
1462 spin_unlock_irqrestore(&chip->lock, flags);
1463
1464 return change;
1465 }
1466
1467 #define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \
1468 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
1469 .info = snd_cs4231_info_single, \
1470 .get = snd_cs4231_get_single, .put = snd_cs4231_put_single, \
1471 .private_value = (reg) | ((shift) << 8) | ((mask) << 16) | ((invert) << 24) }
1472
1473 #define CS4231_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, \
1474 shift_right, mask, invert) \
1475 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
1476 .info = snd_cs4231_info_double, \
1477 .get = snd_cs4231_get_double, .put = snd_cs4231_put_double, \
1478 .private_value = (left_reg) | ((right_reg) << 8) | ((shift_left) << 16) | \
1479 ((shift_right) << 19) | ((mask) << 24) | ((invert) << 22) }
1480
1481 static const struct snd_kcontrol_new snd_cs4231_controls[] = {
1482 CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT,
1483 CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
1484 CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT,
1485 CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
1486 CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN,
1487 CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
1488 CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN,
1489 CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
1490 CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT,
1491 CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1492 CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT,
1493 CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
1494 CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT,
1495 CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1496 CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT,
1497 CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
1498 CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1),
1499 CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
1500 CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1),
1501 CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0),
1502 CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0,
1503 15, 0),
1504 {
1505 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1506 .name = "Capture Source",
1507 .info = snd_cs4231_info_mux,
1508 .get = snd_cs4231_get_mux,
1509 .put = snd_cs4231_put_mux,
1510 },
1511 CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5,
1512 1, 0),
1513 CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
1514 CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1),
1515 /* SPARC specific uses of XCTL{0,1} general purpose outputs. */
1516 CS4231_SINGLE("Line Out Switch", 0, CS4231_PIN_CTRL, 6, 1, 1),
1517 CS4231_SINGLE("Headphone Out Switch", 0, CS4231_PIN_CTRL, 7, 1, 1)
1518 };
1519
1520 static int snd_cs4231_mixer(struct snd_card *card)
1521 {
1522 struct snd_cs4231 *chip = card->private_data;
1523 int err, idx;
1524
1525 if (snd_BUG_ON(!chip || !chip->pcm))
1526 return -EINVAL;
1527
1528 strcpy(card->mixername, chip->pcm->name);
1529
1530 for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) {
1531 err = snd_ctl_add(card,
1532 snd_ctl_new1(&snd_cs4231_controls[idx], chip));
1533 if (err < 0)
1534 return err;
1535 }
1536 return 0;
1537 }
1538
1539 static int dev;
1540
1541 static int cs4231_attach_begin(struct platform_device *op,
1542 struct snd_card **rcard)
1543 {
1544 struct snd_card *card;
1545 struct snd_cs4231 *chip;
1546 int err;
1547
1548 *rcard = NULL;
1549
1550 if (dev >= SNDRV_CARDS)
1551 return -ENODEV;
1552
1553 if (!enable[dev]) {
1554 dev++;
1555 return -ENOENT;
1556 }
1557
1558 err = snd_card_new(&op->dev, index[dev], id[dev], THIS_MODULE,
1559 sizeof(struct snd_cs4231), &card);
1560 if (err < 0)
1561 return err;
1562
1563 strcpy(card->driver, "CS4231");
1564 strcpy(card->shortname, "Sun CS4231");
1565
1566 chip = card->private_data;
1567 chip->card = card;
1568
1569 *rcard = card;
1570 return 0;
1571 }
1572
1573 static int cs4231_attach_finish(struct snd_card *card)
1574 {
1575 struct snd_cs4231 *chip = card->private_data;
1576 int err;
1577
1578 err = snd_cs4231_pcm(card);
1579 if (err < 0)
1580 goto out_err;
1581
1582 err = snd_cs4231_mixer(card);
1583 if (err < 0)
1584 goto out_err;
1585
1586 err = snd_cs4231_timer(card);
1587 if (err < 0)
1588 goto out_err;
1589
1590 err = snd_card_register(card);
1591 if (err < 0)
1592 goto out_err;
1593
1594 dev_set_drvdata(&chip->op->dev, chip);
1595
1596 dev++;
1597 return 0;
1598
1599 out_err:
1600 snd_card_free(card);
1601 return err;
1602 }
1603
1604 #ifdef SBUS_SUPPORT
1605
1606 static irqreturn_t snd_cs4231_sbus_interrupt(int irq, void *dev_id)
1607 {
1608 unsigned long flags;
1609 unsigned char status;
1610 u32 csr;
1611 struct snd_cs4231 *chip = dev_id;
1612
1613 /*This is IRQ is not raised by the cs4231*/
1614 if (!(__cs4231_readb(chip, CS4231U(chip, STATUS)) & CS4231_GLOBALIRQ))
1615 return IRQ_NONE;
1616
1617 /* ACK the APC interrupt. */
1618 csr = sbus_readl(chip->port + APCCSR);
1619
1620 sbus_writel(csr, chip->port + APCCSR);
1621
1622 if ((csr & APC_PDMA_READY) &&
1623 (csr & APC_PLAY_INT) &&
1624 (csr & APC_XINT_PNVA) &&
1625 !(csr & APC_XINT_EMPT))
1626 snd_cs4231_play_callback(chip);
1627
1628 if ((csr & APC_CDMA_READY) &&
1629 (csr & APC_CAPT_INT) &&
1630 (csr & APC_XINT_CNVA) &&
1631 !(csr & APC_XINT_EMPT))
1632 snd_cs4231_capture_callback(chip);
1633
1634 status = snd_cs4231_in(chip, CS4231_IRQ_STATUS);
1635
1636 if (status & CS4231_TIMER_IRQ) {
1637 if (chip->timer)
1638 snd_timer_interrupt(chip->timer, chip->timer->sticks);
1639 }
1640
1641 if ((status & CS4231_RECORD_IRQ) && (csr & APC_CDMA_READY))
1642 snd_cs4231_overrange(chip);
1643
1644 /* ACK the CS4231 interrupt. */
1645 spin_lock_irqsave(&chip->lock, flags);
1646 snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0);
1647 spin_unlock_irqrestore(&chip->lock, flags);
1648
1649 return IRQ_HANDLED;
1650 }
1651
1652 /*
1653 * SBUS DMA routines
1654 */
1655
1656 static int sbus_dma_request(struct cs4231_dma_control *dma_cont,
1657 dma_addr_t bus_addr, size_t len)
1658 {
1659 unsigned long flags;
1660 u32 test, csr;
1661 int err;
1662 struct sbus_dma_info *base = &dma_cont->sbus_info;
1663
1664 if (len >= (1 << 24))
1665 return -EINVAL;
1666 spin_lock_irqsave(&base->lock, flags);
1667 csr = sbus_readl(base->regs + APCCSR);
1668 err = -EINVAL;
1669 test = APC_CDMA_READY;
1670 if (base->dir == APC_PLAY)
1671 test = APC_PDMA_READY;
1672 if (!(csr & test))
1673 goto out;
1674 err = -EBUSY;
1675 test = APC_XINT_CNVA;
1676 if (base->dir == APC_PLAY)
1677 test = APC_XINT_PNVA;
1678 if (!(csr & test))
1679 goto out;
1680 err = 0;
1681 sbus_writel(bus_addr, base->regs + base->dir + APCNVA);
1682 sbus_writel(len, base->regs + base->dir + APCNC);
1683 out:
1684 spin_unlock_irqrestore(&base->lock, flags);
1685 return err;
1686 }
1687
1688 static void sbus_dma_prepare(struct cs4231_dma_control *dma_cont, int d)
1689 {
1690 unsigned long flags;
1691 u32 csr, test;
1692 struct sbus_dma_info *base = &dma_cont->sbus_info;
1693
1694 spin_lock_irqsave(&base->lock, flags);
1695 csr = sbus_readl(base->regs + APCCSR);
1696 test = APC_GENL_INT | APC_PLAY_INT | APC_XINT_ENA |
1697 APC_XINT_PLAY | APC_XINT_PEMP | APC_XINT_GENL |
1698 APC_XINT_PENA;
1699 if (base->dir == APC_RECORD)
1700 test = APC_GENL_INT | APC_CAPT_INT | APC_XINT_ENA |
1701 APC_XINT_CAPT | APC_XINT_CEMP | APC_XINT_GENL;
1702 csr |= test;
1703 sbus_writel(csr, base->regs + APCCSR);
1704 spin_unlock_irqrestore(&base->lock, flags);
1705 }
1706
1707 static void sbus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
1708 {
1709 unsigned long flags;
1710 u32 csr, shift;
1711 struct sbus_dma_info *base = &dma_cont->sbus_info;
1712
1713 spin_lock_irqsave(&base->lock, flags);
1714 if (!on) {
1715 sbus_writel(0, base->regs + base->dir + APCNC);
1716 sbus_writel(0, base->regs + base->dir + APCNVA);
1717 if (base->dir == APC_PLAY) {
1718 sbus_writel(0, base->regs + base->dir + APCC);
1719 sbus_writel(0, base->regs + base->dir + APCVA);
1720 }
1721
1722 udelay(1200);
1723 }
1724 csr = sbus_readl(base->regs + APCCSR);
1725 shift = 0;
1726 if (base->dir == APC_PLAY)
1727 shift = 1;
1728 if (on)
1729 csr &= ~(APC_CPAUSE << shift);
1730 else
1731 csr |= (APC_CPAUSE << shift);
1732 sbus_writel(csr, base->regs + APCCSR);
1733 if (on)
1734 csr |= (APC_CDMA_READY << shift);
1735 else
1736 csr &= ~(APC_CDMA_READY << shift);
1737 sbus_writel(csr, base->regs + APCCSR);
1738
1739 spin_unlock_irqrestore(&base->lock, flags);
1740 }
1741
1742 static unsigned int sbus_dma_addr(struct cs4231_dma_control *dma_cont)
1743 {
1744 struct sbus_dma_info *base = &dma_cont->sbus_info;
1745
1746 return sbus_readl(base->regs + base->dir + APCVA);
1747 }
1748
1749 /*
1750 * Init and exit routines
1751 */
1752
1753 static int snd_cs4231_sbus_free(struct snd_cs4231 *chip)
1754 {
1755 struct platform_device *op = chip->op;
1756
1757 if (chip->irq[0])
1758 free_irq(chip->irq[0], chip);
1759
1760 if (chip->port)
1761 of_iounmap(&op->resource[0], chip->port, chip->regs_size);
1762
1763 return 0;
1764 }
1765
1766 static int snd_cs4231_sbus_dev_free(struct snd_device *device)
1767 {
1768 struct snd_cs4231 *cp = device->device_data;
1769
1770 return snd_cs4231_sbus_free(cp);
1771 }
1772
1773 static const struct snd_device_ops snd_cs4231_sbus_dev_ops = {
1774 .dev_free = snd_cs4231_sbus_dev_free,
1775 };
1776
1777 static int snd_cs4231_sbus_create(struct snd_card *card,
1778 struct platform_device *op,
1779 int dev)
1780 {
1781 struct snd_cs4231 *chip = card->private_data;
1782 int err;
1783
1784 spin_lock_init(&chip->lock);
1785 spin_lock_init(&chip->c_dma.sbus_info.lock);
1786 spin_lock_init(&chip->p_dma.sbus_info.lock);
1787 mutex_init(&chip->mce_mutex);
1788 mutex_init(&chip->open_mutex);
1789 chip->op = op;
1790 chip->regs_size = resource_size(&op->resource[0]);
1791 memcpy(&chip->image, &snd_cs4231_original_image,
1792 sizeof(snd_cs4231_original_image));
1793
1794 chip->port = of_ioremap(&op->resource[0], 0,
1795 chip->regs_size, "cs4231");
1796 if (!chip->port) {
1797 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
1798 return -EIO;
1799 }
1800
1801 chip->c_dma.sbus_info.regs = chip->port;
1802 chip->p_dma.sbus_info.regs = chip->port;
1803 chip->c_dma.sbus_info.dir = APC_RECORD;
1804 chip->p_dma.sbus_info.dir = APC_PLAY;
1805
1806 chip->p_dma.prepare = sbus_dma_prepare;
1807 chip->p_dma.enable = sbus_dma_enable;
1808 chip->p_dma.request = sbus_dma_request;
1809 chip->p_dma.address = sbus_dma_addr;
1810
1811 chip->c_dma.prepare = sbus_dma_prepare;
1812 chip->c_dma.enable = sbus_dma_enable;
1813 chip->c_dma.request = sbus_dma_request;
1814 chip->c_dma.address = sbus_dma_addr;
1815
1816 if (request_irq(op->archdata.irqs[0], snd_cs4231_sbus_interrupt,
1817 IRQF_SHARED, "cs4231", chip)) {
1818 snd_printdd("cs4231-%d: Unable to grab SBUS IRQ %d\n",
1819 dev, op->archdata.irqs[0]);
1820 snd_cs4231_sbus_free(chip);
1821 return -EBUSY;
1822 }
1823 chip->irq[0] = op->archdata.irqs[0];
1824
1825 if (snd_cs4231_probe(chip) < 0) {
1826 snd_cs4231_sbus_free(chip);
1827 return -ENODEV;
1828 }
1829 snd_cs4231_init(chip);
1830
1831 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
1832 chip, &snd_cs4231_sbus_dev_ops);
1833 if (err < 0) {
1834 snd_cs4231_sbus_free(chip);
1835 return err;
1836 }
1837
1838 return 0;
1839 }
1840
1841 static int cs4231_sbus_probe(struct platform_device *op)
1842 {
1843 struct resource *rp = &op->resource[0];
1844 struct snd_card *card;
1845 int err;
1846
1847 err = cs4231_attach_begin(op, &card);
1848 if (err)
1849 return err;
1850
1851 sprintf(card->longname, "%s at 0x%02lx:0x%016Lx, irq %d",
1852 card->shortname,
1853 rp->flags & 0xffL,
1854 (unsigned long long)rp->start,
1855 op->archdata.irqs[0]);
1856
1857 err = snd_cs4231_sbus_create(card, op, dev);
1858 if (err < 0) {
1859 snd_card_free(card);
1860 return err;
1861 }
1862
1863 return cs4231_attach_finish(card);
1864 }
1865 #endif
1866
1867 #ifdef EBUS_SUPPORT
1868
1869 static void snd_cs4231_ebus_play_callback(struct ebus_dma_info *p, int event,
1870 void *cookie)
1871 {
1872 struct snd_cs4231 *chip = cookie;
1873
1874 snd_cs4231_play_callback(chip);
1875 }
1876
1877 static void snd_cs4231_ebus_capture_callback(struct ebus_dma_info *p,
1878 int event, void *cookie)
1879 {
1880 struct snd_cs4231 *chip = cookie;
1881
1882 snd_cs4231_capture_callback(chip);
1883 }
1884
1885 /*
1886 * EBUS DMA wrappers
1887 */
1888
1889 static int _ebus_dma_request(struct cs4231_dma_control *dma_cont,
1890 dma_addr_t bus_addr, size_t len)
1891 {
1892 return ebus_dma_request(&dma_cont->ebus_info, bus_addr, len);
1893 }
1894
1895 static void _ebus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
1896 {
1897 ebus_dma_enable(&dma_cont->ebus_info, on);
1898 }
1899
1900 static void _ebus_dma_prepare(struct cs4231_dma_control *dma_cont, int dir)
1901 {
1902 ebus_dma_prepare(&dma_cont->ebus_info, dir);
1903 }
1904
1905 static unsigned int _ebus_dma_addr(struct cs4231_dma_control *dma_cont)
1906 {
1907 return ebus_dma_addr(&dma_cont->ebus_info);
1908 }
1909
1910 /*
1911 * Init and exit routines
1912 */
1913
1914 static int snd_cs4231_ebus_free(struct snd_cs4231 *chip)
1915 {
1916 struct platform_device *op = chip->op;
1917
1918 if (chip->c_dma.ebus_info.regs) {
1919 ebus_dma_unregister(&chip->c_dma.ebus_info);
1920 of_iounmap(&op->resource[2], chip->c_dma.ebus_info.regs, 0x10);
1921 }
1922 if (chip->p_dma.ebus_info.regs) {
1923 ebus_dma_unregister(&chip->p_dma.ebus_info);
1924 of_iounmap(&op->resource[1], chip->p_dma.ebus_info.regs, 0x10);
1925 }
1926
1927 if (chip->port)
1928 of_iounmap(&op->resource[0], chip->port, 0x10);
1929
1930 return 0;
1931 }
1932
1933 static int snd_cs4231_ebus_dev_free(struct snd_device *device)
1934 {
1935 struct snd_cs4231 *cp = device->device_data;
1936
1937 return snd_cs4231_ebus_free(cp);
1938 }
1939
1940 static const struct snd_device_ops snd_cs4231_ebus_dev_ops = {
1941 .dev_free = snd_cs4231_ebus_dev_free,
1942 };
1943
1944 static int snd_cs4231_ebus_create(struct snd_card *card,
1945 struct platform_device *op,
1946 int dev)
1947 {
1948 struct snd_cs4231 *chip = card->private_data;
1949 int err;
1950
1951 spin_lock_init(&chip->lock);
1952 spin_lock_init(&chip->c_dma.ebus_info.lock);
1953 spin_lock_init(&chip->p_dma.ebus_info.lock);
1954 mutex_init(&chip->mce_mutex);
1955 mutex_init(&chip->open_mutex);
1956 chip->flags |= CS4231_FLAG_EBUS;
1957 chip->op = op;
1958 memcpy(&chip->image, &snd_cs4231_original_image,
1959 sizeof(snd_cs4231_original_image));
1960 strcpy(chip->c_dma.ebus_info.name, "cs4231(capture)");
1961 chip->c_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
1962 chip->c_dma.ebus_info.callback = snd_cs4231_ebus_capture_callback;
1963 chip->c_dma.ebus_info.client_cookie = chip;
1964 chip->c_dma.ebus_info.irq = op->archdata.irqs[0];
1965 strcpy(chip->p_dma.ebus_info.name, "cs4231(play)");
1966 chip->p_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
1967 chip->p_dma.ebus_info.callback = snd_cs4231_ebus_play_callback;
1968 chip->p_dma.ebus_info.client_cookie = chip;
1969 chip->p_dma.ebus_info.irq = op->archdata.irqs[1];
1970
1971 chip->p_dma.prepare = _ebus_dma_prepare;
1972 chip->p_dma.enable = _ebus_dma_enable;
1973 chip->p_dma.request = _ebus_dma_request;
1974 chip->p_dma.address = _ebus_dma_addr;
1975
1976 chip->c_dma.prepare = _ebus_dma_prepare;
1977 chip->c_dma.enable = _ebus_dma_enable;
1978 chip->c_dma.request = _ebus_dma_request;
1979 chip->c_dma.address = _ebus_dma_addr;
1980
1981 chip->port = of_ioremap(&op->resource[0], 0, 0x10, "cs4231");
1982 chip->p_dma.ebus_info.regs =
1983 of_ioremap(&op->resource[1], 0, 0x10, "cs4231_pdma");
1984 chip->c_dma.ebus_info.regs =
1985 of_ioremap(&op->resource[2], 0, 0x10, "cs4231_cdma");
1986 if (!chip->port || !chip->p_dma.ebus_info.regs ||
1987 !chip->c_dma.ebus_info.regs) {
1988 snd_cs4231_ebus_free(chip);
1989 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
1990 return -EIO;
1991 }
1992
1993 if (ebus_dma_register(&chip->c_dma.ebus_info)) {
1994 snd_cs4231_ebus_free(chip);
1995 snd_printdd("cs4231-%d: Unable to register EBUS capture DMA\n",
1996 dev);
1997 return -EBUSY;
1998 }
1999 if (ebus_dma_irq_enable(&chip->c_dma.ebus_info, 1)) {
2000 snd_cs4231_ebus_free(chip);
2001 snd_printdd("cs4231-%d: Unable to enable EBUS capture IRQ\n",
2002 dev);
2003 return -EBUSY;
2004 }
2005
2006 if (ebus_dma_register(&chip->p_dma.ebus_info)) {
2007 snd_cs4231_ebus_free(chip);
2008 snd_printdd("cs4231-%d: Unable to register EBUS play DMA\n",
2009 dev);
2010 return -EBUSY;
2011 }
2012 if (ebus_dma_irq_enable(&chip->p_dma.ebus_info, 1)) {
2013 snd_cs4231_ebus_free(chip);
2014 snd_printdd("cs4231-%d: Unable to enable EBUS play IRQ\n", dev);
2015 return -EBUSY;
2016 }
2017
2018 if (snd_cs4231_probe(chip) < 0) {
2019 snd_cs4231_ebus_free(chip);
2020 return -ENODEV;
2021 }
2022 snd_cs4231_init(chip);
2023
2024 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
2025 chip, &snd_cs4231_ebus_dev_ops);
2026 if (err < 0) {
2027 snd_cs4231_ebus_free(chip);
2028 return err;
2029 }
2030
2031 return 0;
2032 }
2033
2034 static int cs4231_ebus_probe(struct platform_device *op)
2035 {
2036 struct snd_card *card;
2037 int err;
2038
2039 err = cs4231_attach_begin(op, &card);
2040 if (err)
2041 return err;
2042
2043 sprintf(card->longname, "%s at 0x%llx, irq %d",
2044 card->shortname,
2045 op->resource[0].start,
2046 op->archdata.irqs[0]);
2047
2048 err = snd_cs4231_ebus_create(card, op, dev);
2049 if (err < 0) {
2050 snd_card_free(card);
2051 return err;
2052 }
2053
2054 return cs4231_attach_finish(card);
2055 }
2056 #endif
2057
2058 static int cs4231_probe(struct platform_device *op)
2059 {
2060 #ifdef EBUS_SUPPORT
2061 if (of_node_name_eq(op->dev.of_node->parent, "ebus"))
2062 return cs4231_ebus_probe(op);
2063 #endif
2064 #ifdef SBUS_SUPPORT
2065 if (of_node_name_eq(op->dev.of_node->parent, "sbus") ||
2066 of_node_name_eq(op->dev.of_node->parent, "sbi"))
2067 return cs4231_sbus_probe(op);
2068 #endif
2069 return -ENODEV;
2070 }
2071
2072 static void cs4231_remove(struct platform_device *op)
2073 {
2074 struct snd_cs4231 *chip = dev_get_drvdata(&op->dev);
2075
2076 snd_card_free(chip->card);
2077 }
2078
2079 static const struct of_device_id cs4231_match[] = {
2080 {
2081 .name = "SUNW,CS4231",
2082 },
2083 {
2084 .name = "audio",
2085 .compatible = "SUNW,CS4231",
2086 },
2087 {},
2088 };
2089
2090 MODULE_DEVICE_TABLE(of, cs4231_match);
2091
2092 static struct platform_driver cs4231_driver = {
2093 .driver = {
2094 .name = "audio",
2095 .of_match_table = cs4231_match,
2096 },
2097 .probe = cs4231_probe,
2098 .remove_new = cs4231_remove,
2099 };
2100
2101 module_platform_driver(cs4231_driver);
2102
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