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Linux/tools/memory-model/linux-kernel.cat

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  1 // SPDX-License-Identifier: GPL-2.0+
  2 (*
  3  * Copyright (C) 2015 Jade Alglave <j.alglave@ucl.ac.uk>,
  4  * Copyright (C) 2016 Luc Maranget <luc.maranget@inria.fr> for Inria
  5  * Copyright (C) 2017 Alan Stern <stern@rowland.harvard.edu>,
  6  *                    Andrea Parri <parri.andrea@gmail.com>
  7  *
  8  * An earlier version of this file appeared in the companion webpage for
  9  * "Frightening small children and disconcerting grown-ups: Concurrency
 10  * in the Linux kernel" by Alglave, Maranget, McKenney, Parri, and Stern,
 11  * which appeared in ASPLOS 2018.
 12  *)
 13 
 14 "Linux-kernel memory consistency model"
 15 
 16 (*
 17  * File "lock.cat" handles locks and is experimental.
 18  * It can be replaced by include "cos.cat" for tests that do not use locks.
 19  *)
 20 
 21 include "lock.cat"
 22 
 23 (*******************)
 24 (* Basic relations *)
 25 (*******************)
 26 
 27 (* Release Acquire *)
 28 let acq-po = [Acquire] ; po ; [M]
 29 let po-rel = [M] ; po ; [Release]
 30 let po-unlock-lock-po = po ; [UL] ; (po|rf) ; [LKR] ; po
 31 
 32 (* Fences *)
 33 let R4rmb = R \ Noreturn        (* Reads for which rmb works *)
 34 let rmb = [R4rmb] ; fencerel(Rmb) ; [R4rmb]
 35 let wmb = [W] ; fencerel(Wmb) ; [W]
 36 let mb = ([M] ; fencerel(Mb) ; [M]) |
 37         ([M] ; fencerel(Before-atomic) ; [RMW] ; po? ; [M]) |
 38         ([M] ; po? ; [RMW] ; fencerel(After-atomic) ; [M]) |
 39         ([M] ; po? ; [LKW] ; fencerel(After-spinlock) ; [M]) |
 40 (*
 41  * Note: The po-unlock-lock-po relation only passes the lock to the direct
 42  * successor, perhaps giving the impression that the ordering of the
 43  * smp_mb__after_unlock_lock() fence only affects a single lock handover.
 44  * However, in a longer sequence of lock handovers, the implicit
 45  * A-cumulative release fences of lock-release ensure that any stores that
 46  * propagate to one of the involved CPUs before it hands over the lock to
 47  * the next CPU will also propagate to the final CPU handing over the lock
 48  * to the CPU that executes the fence.  Therefore, all those stores are
 49  * also affected by the fence.
 50  *)
 51         ([M] ; po-unlock-lock-po ;
 52                 [After-unlock-lock] ; po ; [M]) |
 53         ([M] ; po? ; [Srcu-unlock] ; fencerel(After-srcu-read-unlock) ; [M])
 54 let gp = po ; [Sync-rcu | Sync-srcu] ; po?
 55 let strong-fence = mb | gp
 56 
 57 let nonrw-fence = strong-fence | po-rel | acq-po
 58 let fence = nonrw-fence | wmb | rmb
 59 let barrier = fencerel(Barrier | Rmb | Wmb | Mb | Sync-rcu | Sync-srcu |
 60                 Before-atomic | After-atomic | Acquire | Release |
 61                 Rcu-lock | Rcu-unlock | Srcu-lock | Srcu-unlock) |
 62         (po ; [Release]) | ([Acquire] ; po)
 63 
 64 (**********************************)
 65 (* Fundamental coherence ordering *)
 66 (**********************************)
 67 
 68 (* Sequential Consistency Per Variable *)
 69 let com = rf | co | fr
 70 acyclic po-loc | com as coherence
 71 
 72 (* Atomic Read-Modify-Write *)
 73 empty rmw & (fre ; coe) as atomic
 74 
 75 (**********************************)
 76 (* Instruction execution ordering *)
 77 (**********************************)
 78 
 79 (* Preserved Program Order *)
 80 let dep = addr | data
 81 let rwdep = (dep | ctrl) ; [W]
 82 let overwrite = co | fr
 83 let to-w = rwdep | (overwrite & int) | (addr ; [Plain] ; wmb)
 84 let to-r = (addr ; [R]) | (dep ; [Marked] ; rfi)
 85 let ppo = to-r | to-w | (fence & int) | (po-unlock-lock-po & int)
 86 
 87 (* Propagation: Ordering from release operations and strong fences. *)
 88 let A-cumul(r) = (rfe ; [Marked])? ; r
 89 let rmw-sequence = (rf ; rmw)*
 90 let cumul-fence = [Marked] ; (A-cumul(strong-fence | po-rel) | wmb |
 91         po-unlock-lock-po) ; [Marked] ; rmw-sequence
 92 let prop = [Marked] ; (overwrite & ext)? ; cumul-fence* ;
 93         [Marked] ; rfe? ; [Marked]
 94 
 95 (*
 96  * Happens Before: Ordering from the passage of time.
 97  * No fences needed here for prop because relation confined to one process.
 98  *)
 99 let hb = [Marked] ; (ppo | rfe | ((prop \ id) & int)) ; [Marked]
100 acyclic hb as happens-before
101 
102 (****************************************)
103 (* Write and fence propagation ordering *)
104 (****************************************)
105 
106 (* Propagation: Each non-rf link needs a strong fence. *)
107 let pb = prop ; strong-fence ; hb* ; [Marked]
108 acyclic pb as propagation
109 
110 (*******)
111 (* RCU *)
112 (*******)
113 
114 (*
115  * Effects of read-side critical sections proceed from the rcu_read_unlock()
116  * or srcu_read_unlock() backwards on the one hand, and from the
117  * rcu_read_lock() or srcu_read_lock() forwards on the other hand.
118  *
119  * In the definition of rcu-fence below, the po term at the left-hand side
120  * of each disjunct and the po? term at the right-hand end have been factored
121  * out.  They have been moved into the definitions of rcu-link and rb.
122  * This was necessary in order to apply the "& loc" tests correctly.
123  *)
124 let rcu-gp = [Sync-rcu]         (* Compare with gp *)
125 let srcu-gp = [Sync-srcu]
126 let rcu-rscsi = rcu-rscs^-1
127 let srcu-rscsi = srcu-rscs^-1
128 
129 (*
130  * The synchronize_rcu() strong fence is special in that it can order not
131  * one but two non-rf relations, but only in conjunction with an RCU
132  * read-side critical section.
133  *)
134 let rcu-link = po? ; hb* ; pb* ; prop ; po
135 
136 (*
137  * Any sequence containing at least as many grace periods as RCU read-side
138  * critical sections (joined by rcu-link) induces order like a generalized
139  * inter-CPU strong fence.
140  * Likewise for SRCU grace periods and read-side critical sections, provided
141  * the synchronize_srcu() and srcu_read_[un]lock() calls refer to the same
142  * struct srcu_struct location.
143  *)
144 let rec rcu-order = rcu-gp | srcu-gp |
145         (rcu-gp ; rcu-link ; rcu-rscsi) |
146         ((srcu-gp ; rcu-link ; srcu-rscsi) & loc) |
147         (rcu-rscsi ; rcu-link ; rcu-gp) |
148         ((srcu-rscsi ; rcu-link ; srcu-gp) & loc) |
149         (rcu-gp ; rcu-link ; rcu-order ; rcu-link ; rcu-rscsi) |
150         ((srcu-gp ; rcu-link ; rcu-order ; rcu-link ; srcu-rscsi) & loc) |
151         (rcu-rscsi ; rcu-link ; rcu-order ; rcu-link ; rcu-gp) |
152         ((srcu-rscsi ; rcu-link ; rcu-order ; rcu-link ; srcu-gp) & loc) |
153         (rcu-order ; rcu-link ; rcu-order)
154 let rcu-fence = po ; rcu-order ; po?
155 let fence = fence | rcu-fence
156 let strong-fence = strong-fence | rcu-fence
157 
158 (* rb orders instructions just as pb does *)
159 let rb = prop ; rcu-fence ; hb* ; pb* ; [Marked]
160 
161 irreflexive rb as rcu
162 
163 (*
164  * The happens-before, propagation, and rcu constraints are all
165  * expressions of temporal ordering.  They could be replaced by
166  * a single constraint on an "executes-before" relation, xb:
167  *
168  * let xb = hb | pb | rb
169  * acyclic xb as executes-before
170  *)
171 
172 (*********************************)
173 (* Plain accesses and data races *)
174 (*********************************)
175 
176 (* Warn about plain writes and marked accesses in the same region *)
177 let mixed-accesses = ([Plain & W] ; (po-loc \ barrier) ; [Marked]) |
178         ([Marked] ; (po-loc \ barrier) ; [Plain & W])
179 flag ~empty mixed-accesses as mixed-accesses
180 
181 (* Executes-before and visibility *)
182 let xbstar = (hb | pb | rb)*
183 let vis = cumul-fence* ; rfe? ; [Marked] ;
184         ((strong-fence ; [Marked] ; xbstar) | (xbstar & int))
185 
186 (* Boundaries for lifetimes of plain accesses *)
187 let w-pre-bounded = [Marked] ; (addr | fence)?
188 let r-pre-bounded = [Marked] ; (addr | nonrw-fence |
189         ([R4rmb] ; fencerel(Rmb) ; [~Noreturn]))?
190 let w-post-bounded = fence? ; [Marked] ; rmw-sequence
191 let r-post-bounded = (nonrw-fence | ([~Noreturn] ; fencerel(Rmb) ; [R4rmb]))? ;
192         [Marked]
193 
194 (* Visibility and executes-before for plain accesses *)
195 let ww-vis = fence | (strong-fence ; xbstar ; w-pre-bounded) |
196         (w-post-bounded ; vis ; w-pre-bounded)
197 let wr-vis = fence | (strong-fence ; xbstar ; r-pre-bounded) |
198         (w-post-bounded ; vis ; r-pre-bounded)
199 let rw-xbstar = fence | (r-post-bounded ; xbstar ; w-pre-bounded)
200 
201 (* Potential races *)
202 let pre-race = ext & ((Plain * M) | ((M \ IW) * Plain))
203 
204 (* Coherence requirements for plain accesses *)
205 let wr-incoh = pre-race & rf & rw-xbstar^-1
206 let rw-incoh = pre-race & fr & wr-vis^-1
207 let ww-incoh = pre-race & co & ww-vis^-1
208 empty (wr-incoh | rw-incoh | ww-incoh) as plain-coherence
209 
210 (* Actual races *)
211 let ww-nonrace = ww-vis & ((Marked * W) | rw-xbstar) & ((W * Marked) | wr-vis)
212 let ww-race = (pre-race & co) \ ww-nonrace
213 let wr-race = (pre-race & (co? ; rf)) \ wr-vis \ rw-xbstar^-1
214 let rw-race = (pre-race & fr) \ rw-xbstar
215 
216 flag ~empty (ww-race | wr-race | rw-race) as data-race

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