1 [
2 {
3 "ArchStdEvent": "MEM_ACCESS_RD"
4 },
5 {
6 "ArchStdEvent": "MEM_ACCESS_WR"
7 },
8 {
9 "ArchStdEvent": "UNALIGNED_LD_SPEC"
10 },
11 {
12 "ArchStdEvent": "UNALIGNED_ST_SPEC"
13 },
14 {
15 "ArchStdEvent": "UNALIGNED_LDST_SPEC"
16 },
17 {
18 "ArchStdEvent": "MEM_ACCESS"
19 },
20 {
21 "PublicDescription": "This event counts any correctable or uncorrectable memory error (ECC or parity) in the protected core RAMs",
22 "ArchStdEvent": "MEMORY_ERROR"
23 }
24 ]
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