1 [
2 {
3 "ArchStdEvent": "BUS_ACCESS",
4 "PublicDescription": "Counts memory transactions issued by the CPU to the external bus, including snoop requests and snoop responses. Each beat of data is counted individually."
5 },
6 {
7 "ArchStdEvent": "BUS_CYCLES",
8 "PublicDescription": "Counts bus cycles in the CPU. Bus cycles represent a clock cycle in which a transaction could be sent or received on the interface from the CPU to the external bus. Since that interface is driven at the same clock speed as the CPU, this event is a duplicate of CPU_CYCLES."
9 },
10 {
11 "ArchStdEvent": "BUS_ACCESS_RD",
12 "PublicDescription": "Counts memory read transactions seen on the external bus. Each beat of data is counted individually."
13 },
14 {
15 "ArchStdEvent": "BUS_ACCESS_WR",
16 "PublicDescription": "Counts memory write transactions seen on the external bus. Each beat of data is counted individually."
17 }
18 ]
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