1 [ 2 { 3 "ArchStdEvent": "L1I_CACHE_REFILL" 4 }, 5 { 6 "ArchStdEvent": "L1I_TLB_REFILL" 7 }, 8 { 9 "ArchStdEvent": "L1D_CACHE_REFILL" 10 }, 11 { 12 "ArchStdEvent": "L1D_CACHE" 13 }, 14 { 15 "ArchStdEvent": "L1D_TLB_REFILL" 16 }, 17 { 18 "ArchStdEvent": "L1I_CACHE" 19 }, 20 { 21 "ArchStdEvent": "L1D_CACHE_WB" 22 }, 23 { 24 "ArchStdEvent": "L2D_CACHE" 25 }, 26 { 27 "ArchStdEvent": "L2D_CACHE_REFILL" 28 }, 29 { 30 "ArchStdEvent": "L2D_CACHE_WB" 31 }, 32 { 33 "ArchStdEvent": "L2D_TLB_REFILL" 34 }, 35 { 36 "ArchStdEvent": "L2I_TLB_REFILL" 37 }, 38 { 39 "ArchStdEvent": "L2D_TLB" 40 }, 41 { 42 "ArchStdEvent": "L2I_TLB" 43 }, 44 { 45 "PublicDescription": "This event counts L1D_CACHE_REFILL caused by software or hardware prefetch.", 46 "EventCode": "0x49", 47 "EventName": "L1D_CACHE_REFILL_PRF", 48 "BriefDescription": "This event counts L1D_CACHE_REFILL caused by software or hardware prefetch." 49 }, 50 { 51 "PublicDescription": "This event counts L2D_CACHE_REFILL caused by software or hardware prefetch.", 52 "EventCode": "0x59", 53 "EventName": "L2D_CACHE_REFILL_PRF", 54 "BriefDescription": "This event counts L2D_CACHE_REFILL caused by software or hardware prefetch." 55 }, 56 { 57 "PublicDescription": "This event counts L1D_CACHE_REFILL caused by demand access.", 58 "EventCode": "0x200", 59 "EventName": "L1D_CACHE_REFILL_DM", 60 "BriefDescription": "This event counts L1D_CACHE_REFILL caused by demand access." 61 }, 62 { 63 "PublicDescription": "This event counts L1D_CACHE_REFILL caused by hardware prefetch.", 64 "EventCode": "0x202", 65 "EventName": "L1D_CACHE_REFILL_HWPRF", 66 "BriefDescription": "This event counts L1D_CACHE_REFILL caused by hardware prefetch." 67 }, 68 { 69 "PublicDescription": "This event counts outstanding L1D cache miss requests per cycle.", 70 "EventCode": "0x208", 71 "EventName": "L1_MISS_WAIT", 72 "BriefDescription": "This event counts outstanding L1D cache miss requests per cycle." 73 }, 74 { 75 "PublicDescription": "This event counts outstanding L1I cache miss requests per cycle.", 76 "EventCode": "0x209", 77 "EventName": "L1I_MISS_WAIT", 78 "BriefDescription": "This event counts outstanding L1I cache miss requests per cycle." 79 }, 80 { 81 "PublicDescription": "This event counts L2D_CACHE_REFILL caused by demand access.", 82 "EventCode": "0x300", 83 "EventName": "L2D_CACHE_REFILL_DM", 84 "BriefDescription": "This event counts L2D_CACHE_REFILL caused by demand access." 85 }, 86 { 87 "PublicDescription": "This event counts L2D_CACHE_REFILL caused by hardware prefetch.", 88 "EventCode": "0x302", 89 "EventName": "L2D_CACHE_REFILL_HWPRF", 90 "BriefDescription": "This event counts L2D_CACHE_REFILL caused by hardware prefetch." 91 }, 92 { 93 "PublicDescription": "This event counts outstanding L2 cache miss requests per cycle.", 94 "EventCode": "0x308", 95 "EventName": "L2_MISS_WAIT", 96 "BriefDescription": "This event counts outstanding L2 cache miss requests per cycle." 97 }, 98 { 99 "PublicDescription": "This event counts the number of times of L2 cache miss.", 100 "EventCode": "0x309", 101 "EventName": "L2_MISS_COUNT", 102 "BriefDescription": "This event counts the number of times of L2 cache miss." 103 }, 104 { 105 "PublicDescription": "This event counts operations where demand access hits an L2 cache refill buffer allocated by software or hardware prefetch.", 106 "EventCode": "0x325", 107 "EventName": "L2D_SWAP_DM", 108 "BriefDescription": "This event counts operations where demand access hits an L2 cache refill buffer allocated by software or hardware prefetch." 109 }, 110 { 111 "PublicDescription": "This event counts operations where software or hardware prefetch hits an L2 cache refill buffer allocated by demand access.", 112 "EventCode": "0x326", 113 "EventName": "L2D_CACHE_MIBMCH_PRF", 114 "BriefDescription": "This event counts operations where software or hardware prefetch hits an L2 cache refill buffer allocated by demand access." 115 }, 116 { 117 "PublicDescription": "This event counts operations where demand access hits an L2 cache refill buffer allocated by software or hardware prefetch.", 118 "EventCode": "0x396", 119 "EventName": "L2D_CACHE_SWAP_LOCAL", 120 "BriefDescription": "This event counts operations where demand access hits an L2 cache refill buffer allocated by software or hardware prefetch." 121 }, 122 { 123 "PublicDescription": "This event counts energy consumption per cycle of L2 cache.", 124 "EventCode": "0x3E0", 125 "EventName": "EA_L2", 126 "BriefDescription": "This event counts energy consumption per cycle of L2 cache." 127 } 128 ]
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.