1 [
2 {
3 "ArchStdEvent": "SW_INCR"
4 },
5 {
6 "ArchStdEvent": "INST_RETIRED"
7 },
8 {
9 "ArchStdEvent": "EXC_RETURN"
10 },
11 {
12 "ArchStdEvent": "CID_WRITE_RETIRED"
13 },
14 {
15 "ArchStdEvent": "INST_SPEC"
16 },
17 {
18 "ArchStdEvent": "LDREX_SPEC"
19 },
20 {
21 "ArchStdEvent": "STREX_SPEC"
22 },
23 {
24 "ArchStdEvent": "LD_SPEC"
25 },
26 {
27 "ArchStdEvent": "ST_SPEC"
28 },
29 {
30 "ArchStdEvent": "LDST_SPEC"
31 },
32 {
33 "ArchStdEvent": "DP_SPEC"
34 },
35 {
36 "ArchStdEvent": "ASE_SPEC"
37 },
38 {
39 "ArchStdEvent": "VFP_SPEC"
40 },
41 {
42 "ArchStdEvent": "PC_WRITE_SPEC"
43 },
44 {
45 "ArchStdEvent": "CRYPTO_SPEC"
46 },
47 {
48 "ArchStdEvent": "BR_IMMED_SPEC"
49 },
50 {
51 "ArchStdEvent": "BR_RETURN_SPEC"
52 },
53 {
54 "ArchStdEvent": "BR_INDIRECT_SPEC"
55 },
56 {
57 "ArchStdEvent": "ISB_SPEC"
58 },
59 {
60 "ArchStdEvent": "DSB_SPEC"
61 },
62 {
63 "ArchStdEvent": "DMB_SPEC"
64 },
65 {
66 "PublicDescription": "This event counts architecturally executed zero blocking operations due to the 'DC ZVA' instruction.",
67 "EventCode": "0x9F",
68 "EventName": "DCZVA_SPEC",
69 "BriefDescription": "This event counts architecturally executed zero blocking operations due to the 'DC ZVA' instruction."
70 },
71 {
72 "PublicDescription": "This event counts architecturally executed floating-point move operations.",
73 "EventCode": "0x105",
74 "EventName": "FP_MV_SPEC",
75 "BriefDescription": "This event counts architecturally executed floating-point move operations."
76 },
77 {
78 "PublicDescription": "This event counts architecturally executed operations that using predicate register.",
79 "EventCode": "0x108",
80 "EventName": "PRD_SPEC",
81 "BriefDescription": "This event counts architecturally executed operations that using predicate register."
82 },
83 {
84 "PublicDescription": "This event counts architecturally executed inter-element manipulation operations.",
85 "EventCode": "0x109",
86 "EventName": "IEL_SPEC",
87 "BriefDescription": "This event counts architecturally executed inter-element manipulation operations."
88 },
89 {
90 "PublicDescription": "This event counts architecturally executed inter-register manipulation operations.",
91 "EventCode": "0x10A",
92 "EventName": "IREG_SPEC",
93 "BriefDescription": "This event counts architecturally executed inter-register manipulation operations."
94 },
95 {
96 "PublicDescription": "This event counts architecturally executed NOSIMD load operations that using SIMD&FP registers.",
97 "EventCode": "0x112",
98 "EventName": "FP_LD_SPEC",
99 "BriefDescription": "This event counts architecturally executed NOSIMD load operations that using SIMD&FP registers."
100 },
101 {
102 "PublicDescription": "This event counts architecturally executed NOSIMD store operations that using SIMD&FP registers.",
103 "EventCode": "0x113",
104 "EventName": "FP_ST_SPEC",
105 "BriefDescription": "This event counts architecturally executed NOSIMD store operations that using SIMD&FP registers."
106 },
107 {
108 "PublicDescription": "This event counts architecturally executed SIMD broadcast floating-point load operations.",
109 "EventCode": "0x11A",
110 "EventName": "BC_LD_SPEC",
111 "BriefDescription": "This event counts architecturally executed SIMD broadcast floating-point load operations."
112 },
113 {
114 "PublicDescription": "This event counts architecturally executed instructions, excluding the MOVPRFX instruction.",
115 "EventCode": "0x121",
116 "EventName": "EFFECTIVE_INST_SPEC",
117 "BriefDescription": "This event counts architecturally executed instructions, excluding the MOVPRFX instruction."
118 },
119 {
120 "PublicDescription": "This event counts architecturally executed operations that uses 'pre-index' as its addressing mode.",
121 "EventCode": "0x123",
122 "EventName": "PRE_INDEX_SPEC",
123 "BriefDescription": "This event counts architecturally executed operations that uses 'pre-index' as its addressing mode."
124 },
125 {
126 "PublicDescription": "This event counts architecturally executed operations that uses 'post-index' as its addressing mode.",
127 "EventCode": "0x124",
128 "EventName": "POST_INDEX_SPEC",
129 "BriefDescription": "This event counts architecturally executed operations that uses 'post-index' as its addressing mode."
130 }
131 ]
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