1 [
2 {
3 "ArchStdEvent": "STALL_FRONTEND"
4 },
5 {
6 "ArchStdEvent": "STALL_BACKEND"
7 },
8 {
9 "PublicDescription": "This event counts valid cycles of EAGA pipeline.",
10 "EventCode": "0x1A0",
11 "EventName": "EAGA_VAL",
12 "BriefDescription": "This event counts valid cycles of EAGA pipeline."
13 },
14 {
15 "PublicDescription": "This event counts valid cycles of EAGB pipeline.",
16 "EventCode": "0x1A1",
17 "EventName": "EAGB_VAL",
18 "BriefDescription": "This event counts valid cycles of EAGB pipeline."
19 },
20 {
21 "PublicDescription": "This event counts valid cycles of EXA pipeline.",
22 "EventCode": "0x1A2",
23 "EventName": "EXA_VAL",
24 "BriefDescription": "This event counts valid cycles of EXA pipeline."
25 },
26 {
27 "PublicDescription": "This event counts valid cycles of EXB pipeline.",
28 "EventCode": "0x1A3",
29 "EventName": "EXB_VAL",
30 "BriefDescription": "This event counts valid cycles of EXB pipeline."
31 },
32 {
33 "PublicDescription": "This event counts valid cycles of FLA pipeline.",
34 "EventCode": "0x1A4",
35 "EventName": "FLA_VAL",
36 "BriefDescription": "This event counts valid cycles of FLA pipeline."
37 },
38 {
39 "PublicDescription": "This event counts valid cycles of FLB pipeline.",
40 "EventCode": "0x1A5",
41 "EventName": "FLB_VAL",
42 "BriefDescription": "This event counts valid cycles of FLB pipeline."
43 },
44 {
45 "PublicDescription": "This event counts valid cycles of PRX pipeline.",
46 "EventCode": "0x1A6",
47 "EventName": "PRX_VAL",
48 "BriefDescription": "This event counts valid cycles of PRX pipeline."
49 },
50 {
51 "PublicDescription": "This event counts the number of 1's in the predicate bits of request in FLA pipeline, where it is corrected so that it becomes 16 when all bits are 1.",
52 "EventCode": "0x1B4",
53 "EventName": "FLA_VAL_PRD_CNT",
54 "BriefDescription": "This event counts the number of 1's in the predicate bits of request in FLA pipeline, where it is corrected so that it becomes 16 when all bits are 1."
55 },
56 {
57 "PublicDescription": "This event counts the number of 1's in the predicate bits of request in FLB pipeline, where it is corrected so that it becomes 16 when all bits are 1.",
58 "EventCode": "0x1B5",
59 "EventName": "FLB_VAL_PRD_CNT",
60 "BriefDescription": "This event counts the number of 1's in the predicate bits of request in FLB pipeline, where it is corrected so that it becomes 16 when all bits are 1."
61 },
62 {
63 "PublicDescription": "This event counts valid cycles of L1D cache pipeline#0.",
64 "EventCode": "0x240",
65 "EventName": "L1_PIPE0_VAL",
66 "BriefDescription": "This event counts valid cycles of L1D cache pipeline#0."
67 },
68 {
69 "PublicDescription": "This event counts valid cycles of L1D cache pipeline#1.",
70 "EventCode": "0x241",
71 "EventName": "L1_PIPE1_VAL",
72 "BriefDescription": "This event counts valid cycles of L1D cache pipeline#1."
73 },
74 {
75 "PublicDescription": "This event counts requests in L1D cache pipeline#0 that its sce bit of tagged address is 1.",
76 "EventCode": "0x250",
77 "EventName": "L1_PIPE0_VAL_IU_TAG_ADRS_SCE",
78 "BriefDescription": "This event counts requests in L1D cache pipeline#0 that its sce bit of tagged address is 1."
79 },
80 {
81 "PublicDescription": "This event counts requests in L1D cache pipeline#0 that its pfe bit of tagged address is 1.",
82 "EventCode": "0x251",
83 "EventName": "L1_PIPE0_VAL_IU_TAG_ADRS_PFE",
84 "BriefDescription": "This event counts requests in L1D cache pipeline#0 that its pfe bit of tagged address is 1."
85 },
86 {
87 "PublicDescription": "This event counts requests in L1D cache pipeline#1 that its sce bit of tagged address is 1.",
88 "EventCode": "0x252",
89 "EventName": "L1_PIPE1_VAL_IU_TAG_ADRS_SCE",
90 "BriefDescription": "This event counts requests in L1D cache pipeline#1 that its sce bit of tagged address is 1."
91 },
92 {
93 "PublicDescription": "This event counts requests in L1D cache pipeline#1 that its pfe bit of tagged address is 1.",
94 "EventCode": "0x253",
95 "EventName": "L1_PIPE1_VAL_IU_TAG_ADRS_PFE",
96 "BriefDescription": "This event counts requests in L1D cache pipeline#1 that its pfe bit of tagged address is 1."
97 },
98 {
99 "PublicDescription": "This event counts completed requests in L1D cache pipeline#0.",
100 "EventCode": "0x260",
101 "EventName": "L1_PIPE0_COMP",
102 "BriefDescription": "This event counts completed requests in L1D cache pipeline#0."
103 },
104 {
105 "PublicDescription": "This event counts completed requests in L1D cache pipeline#1.",
106 "EventCode": "0x261",
107 "EventName": "L1_PIPE1_COMP",
108 "BriefDescription": "This event counts completed requests in L1D cache pipeline#1."
109 },
110 {
111 "PublicDescription": "This event counts completed requests in L1I cache pipeline.",
112 "EventCode": "0x268",
113 "EventName": "L1I_PIPE_COMP",
114 "BriefDescription": "This event counts completed requests in L1I cache pipeline."
115 },
116 {
117 "PublicDescription": "This event counts valid cycles of L1I cache pipeline.",
118 "EventCode": "0x269",
119 "EventName": "L1I_PIPE_VAL",
120 "BriefDescription": "This event counts valid cycles of L1I cache pipeline."
121 },
122 {
123 "PublicDescription": "This event counts aborted requests in L1D pipelines that due to store-load interlock.",
124 "EventCode": "0x274",
125 "EventName": "L1_PIPE_ABORT_STLD_INTLK",
126 "BriefDescription": "This event counts aborted requests in L1D pipelines that due to store-load interlock."
127 },
128 {
129 "PublicDescription": "This event counts requests in L1D cache pipeline#0 that its sector cache ID is not 0.",
130 "EventCode": "0x2A0",
131 "EventName": "L1_PIPE0_VAL_IU_NOT_SEC0",
132 "BriefDescription": "This event counts requests in L1D cache pipeline#0 that its sector cache ID is not 0."
133 },
134 {
135 "PublicDescription": "This event counts requests in L1D cache pipeline#1 that its sector cache ID is not 0.",
136 "EventCode": "0x2A1",
137 "EventName": "L1_PIPE1_VAL_IU_NOT_SEC0",
138 "BriefDescription": "This event counts requests in L1D cache pipeline#1 that its sector cache ID is not 0."
139 },
140 {
141 "PublicDescription": "This event counts the number of times where 2 elements of the gather instructions became 2 flows because 2 elements could not be combined.",
142 "EventCode": "0x2B0",
143 "EventName": "L1_PIPE_COMP_GATHER_2FLOW",
144 "BriefDescription": "This event counts the number of times where 2 elements of the gather instructions became 2 flows because 2 elements could not be combined."
145 },
146 {
147 "PublicDescription": "This event counts the number of times where 2 elements of the gather instructions became 1 flow because 2 elements could be combined.",
148 "EventCode": "0x2B1",
149 "EventName": "L1_PIPE_COMP_GATHER_1FLOW",
150 "BriefDescription": "This event counts the number of times where 2 elements of the gather instructions became 1 flow because 2 elements could be combined."
151 },
152 {
153 "PublicDescription": "This event counts the number of times where 2 elements of the gather instructions became 0 flow because both predicate values are 0.",
154 "EventCode": "0x2B2",
155 "EventName": "L1_PIPE_COMP_GATHER_0FLOW",
156 "BriefDescription": "This event counts the number of times where 2 elements of the gather instructions became 0 flow because both predicate values are 0."
157 },
158 {
159 "PublicDescription": "This event counts the number of flows of the scatter instructions.",
160 "EventCode": "0x2B3",
161 "EventName": "L1_PIPE_COMP_SCATTER_1FLOW",
162 "BriefDescription": "This event counts the number of flows of the scatter instructions."
163 },
164 {
165 "PublicDescription": "This event counts the number of 1's in the predicate bits of request in L1D cache pipeline#0, where it is corrected so that it becomes 16 when all bits are 1.",
166 "EventCode": "0x2B8",
167 "EventName": "L1_PIPE0_COMP_PRD_CNT",
168 "BriefDescription": "This event counts the number of 1's in the predicate bits of request in L1D cache pipeline#0, where it is corrected so that it becomes 16 when all bits are 1."
169 },
170 {
171 "PublicDescription": "This event counts the number of 1's in the predicate bits of request in L1D cache pipeline#1, where it is corrected so that it becomes 16 when all bits are 1.",
172 "EventCode": "0x2B9",
173 "EventName": "L1_PIPE1_COMP_PRD_CNT",
174 "BriefDescription": "This event counts the number of 1's in the predicate bits of request in L1D cache pipeline#1, where it is corrected so that it becomes 16 when all bits are 1."
175 },
176 {
177 "PublicDescription": "This event counts valid cycles of L2 cache pipeline.",
178 "EventCode": "0x330",
179 "EventName": "L2_PIPE_VAL",
180 "BriefDescription": "This event counts valid cycles of L2 cache pipeline."
181 },
182 {
183 "PublicDescription": "This event counts completed requests in L2 cache pipeline.",
184 "EventCode": "0x350",
185 "EventName": "L2_PIPE_COMP_ALL",
186 "BriefDescription": "This event counts completed requests in L2 cache pipeline."
187 },
188 {
189 "PublicDescription": "This event counts operations where software or hardware prefetch hits an L2 cache refill buffer allocated by demand access.",
190 "EventCode": "0x370",
191 "EventName": "L2_PIPE_COMP_PF_L2MIB_MCH",
192 "BriefDescription": "This event counts operations where software or hardware prefetch hits an L2 cache refill buffer allocated by demand access."
193 }
194 ]
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