1 [
2 {
3 "BriefDescription": "Bogus branches",
4 "Counter": "0,1",
5 "EventCode": "0xE4",
6 "EventName": "BOGUS_BR",
7 "SampleAfterValue": "2000000",
8 "UMask": "0x1"
9 },
10 {
11 "BriefDescription": "Branch instructions decoded",
12 "Counter": "0,1",
13 "EventCode": "0xE0",
14 "EventName": "BR_INST_DECODED",
15 "SampleAfterValue": "2000000",
16 "UMask": "0x1"
17 },
18 {
19 "BriefDescription": "Retired branch instructions.",
20 "Counter": "0,1",
21 "EventCode": "0xC4",
22 "EventName": "BR_INST_RETIRED.ANY",
23 "SampleAfterValue": "2000000"
24 },
25 {
26 "BriefDescription": "Retired branch instructions.",
27 "Counter": "0,1",
28 "EventCode": "0xC4",
29 "EventName": "BR_INST_RETIRED.ANY1",
30 "SampleAfterValue": "2000000",
31 "UMask": "0xf"
32 },
33 {
34 "BriefDescription": "Retired mispredicted branch instructions (precise event).",
35 "Counter": "0,1",
36 "EventCode": "0xC5",
37 "EventName": "BR_INST_RETIRED.MISPRED",
38 "PEBS": "1",
39 "SampleAfterValue": "200000"
40 },
41 {
42 "BriefDescription": "Retired branch instructions that were mispredicted not-taken.",
43 "Counter": "0,1",
44 "EventCode": "0xC4",
45 "EventName": "BR_INST_RETIRED.MISPRED_NOT_TAKEN",
46 "SampleAfterValue": "200000",
47 "UMask": "0x2"
48 },
49 {
50 "BriefDescription": "Retired branch instructions that were mispredicted taken.",
51 "Counter": "0,1",
52 "EventCode": "0xC4",
53 "EventName": "BR_INST_RETIRED.MISPRED_TAKEN",
54 "SampleAfterValue": "200000",
55 "UMask": "0x8"
56 },
57 {
58 "BriefDescription": "Retired branch instructions that were predicted not-taken.",
59 "Counter": "0,1",
60 "EventCode": "0xC4",
61 "EventName": "BR_INST_RETIRED.PRED_NOT_TAKEN",
62 "SampleAfterValue": "2000000",
63 "UMask": "0x1"
64 },
65 {
66 "BriefDescription": "Retired branch instructions that were predicted taken.",
67 "Counter": "0,1",
68 "EventCode": "0xC4",
69 "EventName": "BR_INST_RETIRED.PRED_TAKEN",
70 "SampleAfterValue": "2000000",
71 "UMask": "0x4"
72 },
73 {
74 "BriefDescription": "Retired taken branch instructions.",
75 "Counter": "0,1",
76 "EventCode": "0xC4",
77 "EventName": "BR_INST_RETIRED.TAKEN",
78 "SampleAfterValue": "2000000",
79 "UMask": "0xc"
80 },
81 {
82 "BriefDescription": "All macro conditional branch instructions.",
83 "Counter": "0,1",
84 "EventCode": "0x88",
85 "EventName": "BR_INST_TYPE_RETIRED.COND",
86 "SampleAfterValue": "2000000",
87 "UMask": "0x1"
88 },
89 {
90 "BriefDescription": "Only taken macro conditional branch instructions",
91 "Counter": "0,1",
92 "EventCode": "0x88",
93 "EventName": "BR_INST_TYPE_RETIRED.COND_TAKEN",
94 "SampleAfterValue": "2000000",
95 "UMask": "0x41"
96 },
97 {
98 "BriefDescription": "All non-indirect calls",
99 "Counter": "0,1",
100 "EventCode": "0x88",
101 "EventName": "BR_INST_TYPE_RETIRED.DIR_CALL",
102 "SampleAfterValue": "2000000",
103 "UMask": "0x10"
104 },
105 {
106 "BriefDescription": "All indirect branches that are not calls.",
107 "Counter": "0,1",
108 "EventCode": "0x88",
109 "EventName": "BR_INST_TYPE_RETIRED.IND",
110 "SampleAfterValue": "2000000",
111 "UMask": "0x4"
112 },
113 {
114 "BriefDescription": "All indirect calls, including both register and memory indirect.",
115 "Counter": "0,1",
116 "EventCode": "0x88",
117 "EventName": "BR_INST_TYPE_RETIRED.IND_CALL",
118 "SampleAfterValue": "2000000",
119 "UMask": "0x20"
120 },
121 {
122 "BriefDescription": "All indirect branches that have a return mnemonic",
123 "Counter": "0,1",
124 "EventCode": "0x88",
125 "EventName": "BR_INST_TYPE_RETIRED.RET",
126 "SampleAfterValue": "2000000",
127 "UMask": "0x8"
128 },
129 {
130 "BriefDescription": "All macro unconditional branch instructions, excluding calls and indirects",
131 "Counter": "0,1",
132 "EventCode": "0x88",
133 "EventName": "BR_INST_TYPE_RETIRED.UNCOND",
134 "SampleAfterValue": "2000000",
135 "UMask": "0x2"
136 },
137 {
138 "BriefDescription": "Mispredicted cond branch instructions retired",
139 "Counter": "0,1",
140 "EventCode": "0x89",
141 "EventName": "BR_MISSP_TYPE_RETIRED.COND",
142 "SampleAfterValue": "200000",
143 "UMask": "0x1"
144 },
145 {
146 "BriefDescription": "Mispredicted and taken cond branch instructions retired",
147 "Counter": "0,1",
148 "EventCode": "0x89",
149 "EventName": "BR_MISSP_TYPE_RETIRED.COND_TAKEN",
150 "SampleAfterValue": "200000",
151 "UMask": "0x11"
152 },
153 {
154 "BriefDescription": "Mispredicted ind branches that are not calls",
155 "Counter": "0,1",
156 "EventCode": "0x89",
157 "EventName": "BR_MISSP_TYPE_RETIRED.IND",
158 "SampleAfterValue": "200000",
159 "UMask": "0x2"
160 },
161 {
162 "BriefDescription": "Mispredicted indirect calls, including both register and memory indirect.",
163 "Counter": "0,1",
164 "EventCode": "0x89",
165 "EventName": "BR_MISSP_TYPE_RETIRED.IND_CALL",
166 "SampleAfterValue": "200000",
167 "UMask": "0x8"
168 },
169 {
170 "BriefDescription": "Mispredicted return branches",
171 "Counter": "0,1",
172 "EventCode": "0x89",
173 "EventName": "BR_MISSP_TYPE_RETIRED.RETURN",
174 "SampleAfterValue": "200000",
175 "UMask": "0x4"
176 },
177 {
178 "BriefDescription": "Bus cycles when core is not halted",
179 "Counter": "0,1",
180 "EventCode": "0x3C",
181 "EventName": "CPU_CLK_UNHALTED.BUS",
182 "SampleAfterValue": "200000",
183 "UMask": "0x1"
184 },
185 {
186 "BriefDescription": "Core cycles when core is not halted",
187 "Counter": "Fixed counter 2",
188 "EventCode": "0xA",
189 "EventName": "CPU_CLK_UNHALTED.CORE",
190 "SampleAfterValue": "2000000"
191 },
192 {
193 "BriefDescription": "Core cycles when core is not halted",
194 "Counter": "0,1",
195 "EventCode": "0x3C",
196 "EventName": "CPU_CLK_UNHALTED.CORE_P",
197 "SampleAfterValue": "2000000"
198 },
199 {
200 "BriefDescription": "Reference cycles when core is not halted.",
201 "Counter": "Fixed counter 3",
202 "EventCode": "0xA",
203 "EventName": "CPU_CLK_UNHALTED.REF",
204 "SampleAfterValue": "2000000"
205 },
206 {
207 "BriefDescription": "Cycles the divider is busy.",
208 "Counter": "0,1",
209 "EventCode": "0x14",
210 "EventName": "CYCLES_DIV_BUSY",
211 "SampleAfterValue": "2000000",
212 "UMask": "0x1"
213 },
214 {
215 "BriefDescription": "Divide operations retired",
216 "Counter": "0,1",
217 "EventCode": "0x13",
218 "EventName": "DIV.AR",
219 "SampleAfterValue": "2000000",
220 "UMask": "0x81"
221 },
222 {
223 "BriefDescription": "Divide operations executed.",
224 "Counter": "0,1",
225 "EventCode": "0x13",
226 "EventName": "DIV.S",
227 "SampleAfterValue": "2000000",
228 "UMask": "0x1"
229 },
230 {
231 "BriefDescription": "Instructions retired.",
232 "Counter": "Fixed counter 1",
233 "EventCode": "0xA",
234 "EventName": "INST_RETIRED.ANY",
235 "SampleAfterValue": "2000000"
236 },
237 {
238 "BriefDescription": "Instructions retired (precise event).",
239 "Counter": "0,1",
240 "EventCode": "0xC0",
241 "EventName": "INST_RETIRED.ANY_P",
242 "PEBS": "2",
243 "SampleAfterValue": "2000000"
244 },
245 {
246 "BriefDescription": "Self-Modifying Code detected.",
247 "Counter": "0,1",
248 "EventCode": "0xC3",
249 "EventName": "MACHINE_CLEARS.SMC",
250 "SampleAfterValue": "200000",
251 "UMask": "0x1"
252 },
253 {
254 "BriefDescription": "Multiply operations retired",
255 "Counter": "0,1",
256 "EventCode": "0x12",
257 "EventName": "MUL.AR",
258 "SampleAfterValue": "2000000",
259 "UMask": "0x81"
260 },
261 {
262 "BriefDescription": "Multiply operations executed.",
263 "Counter": "0,1",
264 "EventCode": "0x12",
265 "EventName": "MUL.S",
266 "SampleAfterValue": "2000000",
267 "UMask": "0x1"
268 },
269 {
270 "BriefDescription": "Micro-op reissues for any cause",
271 "Counter": "0,1",
272 "EventCode": "0x3",
273 "EventName": "REISSUE.ANY",
274 "SampleAfterValue": "200000",
275 "UMask": "0x7f"
276 },
277 {
278 "BriefDescription": "Micro-op reissues for any cause (At Retirement)",
279 "Counter": "0,1",
280 "EventCode": "0x3",
281 "EventName": "REISSUE.ANY.AR",
282 "SampleAfterValue": "200000",
283 "UMask": "0xff"
284 },
285 {
286 "BriefDescription": "Micro-op reissues on a store-load collision",
287 "Counter": "0,1",
288 "EventCode": "0x3",
289 "EventName": "REISSUE.OVERLAP_STORE",
290 "SampleAfterValue": "200000",
291 "UMask": "0x1"
292 },
293 {
294 "BriefDescription": "Micro-op reissues on a store-load collision (At Retirement)",
295 "Counter": "0,1",
296 "EventCode": "0x3",
297 "EventName": "REISSUE.OVERLAP_STORE.AR",
298 "SampleAfterValue": "200000",
299 "UMask": "0x81"
300 },
301 {
302 "BriefDescription": "Cycles issue is stalled due to div busy.",
303 "Counter": "0,1",
304 "EventCode": "0xDC",
305 "EventName": "RESOURCE_STALLS.DIV_BUSY",
306 "SampleAfterValue": "2000000",
307 "UMask": "0x2"
308 },
309 {
310 "BriefDescription": "All store forwards",
311 "Counter": "0,1",
312 "EventCode": "0x2",
313 "EventName": "STORE_FORWARDS.ANY",
314 "SampleAfterValue": "200000",
315 "UMask": "0x83"
316 },
317 {
318 "BriefDescription": "Good store forwards",
319 "Counter": "0,1",
320 "EventCode": "0x2",
321 "EventName": "STORE_FORWARDS.GOOD",
322 "SampleAfterValue": "200000",
323 "UMask": "0x81"
324 },
325 {
326 "BriefDescription": "Micro-ops retired.",
327 "Counter": "0,1",
328 "EventCode": "0xC2",
329 "EventName": "UOPS_RETIRED.ANY",
330 "SampleAfterValue": "2000000",
331 "UMask": "0x10"
332 },
333 {
334 "BriefDescription": "Cycles no micro-ops retired.",
335 "Counter": "0,1",
336 "EventCode": "0xC2",
337 "EventName": "UOPS_RETIRED.STALLED_CYCLES",
338 "SampleAfterValue": "2000000",
339 "UMask": "0x10"
340 },
341 {
342 "BriefDescription": "Periods no micro-ops retired.",
343 "Counter": "0,1",
344 "EventCode": "0xC2",
345 "EventName": "UOPS_RETIRED.STALLS",
346 "SampleAfterValue": "2000000",
347 "UMask": "0x10"
348 }
349 ]
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