1 [
2 {
3 "BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped to the Non-AVX turbo schedule.",
4 "Counter": "0,1,2,3",
5 "EventCode": "0x28",
6 "EventName": "CORE_POWER.LVL0_TURBO_LICENSE",
7 "PublicDescription": "Counts Core cycles where the core was running with power-delivery for baseline license level 0. This includes non-AVX codes, SSE, AVX 128-bit, and low-current AVX 256-bit codes.",
8 "SampleAfterValue": "200003",
9 "UMask": "0x7"
10 },
11 {
12 "BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped to the AVX2 turbo schedule.",
13 "Counter": "0,1,2,3",
14 "EventCode": "0x28",
15 "EventName": "CORE_POWER.LVL1_TURBO_LICENSE",
16 "PublicDescription": "Counts Core cycles where the core was running with power-delivery for license level 1. This includes high current AVX 256-bit instructions as well as low current AVX 512-bit instructions.",
17 "SampleAfterValue": "200003",
18 "UMask": "0x18"
19 },
20 {
21 "BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped to the AVX512 turbo schedule.",
22 "Counter": "0,1,2,3",
23 "EventCode": "0x28",
24 "EventName": "CORE_POWER.LVL2_TURBO_LICENSE",
25 "PublicDescription": "Core cycles where the core was running with power-delivery for license level 2 (introduced in Skylake Server microarchitecture). This includes high current AVX 512-bit instructions.",
26 "SampleAfterValue": "200003",
27 "UMask": "0x20"
28 },
29 {
30 "BriefDescription": "Counts streaming stores that have any type of response.",
31 "Counter": "0,1,2,3",
32 "EventCode": "0xB7, 0xBB",
33 "EventName": "OCR.STREAMING_WR.ANY_RESPONSE",
34 "MSRIndex": "0x1a6,0x1a7",
35 "MSRValue": "0x10800",
36 "SampleAfterValue": "100003",
37 "UMask": "0x1"
38 }
39 ]
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