1 # EventClass.py
2 # SPDX-License-Identifier: GPL-2.0
3 #
4 # This is a library defining some events types classes, which could
5 # be used by other scripts to analyzing the perf samples.
6 #
7 # Currently there are just a few classes defined for examples,
8 # PerfEvent is the base class for all perf event sample, PebsEvent
9 # is a HW base Intel x86 PEBS event, and user could add more SW/HW
10 # event classes based on requirements.
11 from __future__ import print_function
12
13 import struct
14
15 # Event types, user could add more here
16 EVTYPE_GENERIC = 0
17 EVTYPE_PEBS = 1 # Basic PEBS event
18 EVTYPE_PEBS_LL = 2 # PEBS event with load latency info
19 EVTYPE_IBS = 3
20
21 #
22 # Currently we don't have good way to tell the event type, but by
23 # the size of raw buffer, raw PEBS event with load latency data's
24 # size is 176 bytes, while the pure PEBS event's size is 144 bytes.
25 #
26 def create_event(name, comm, dso, symbol, raw_buf):
27 if (len(raw_buf) == 144):
28 event = PebsEvent(name, comm, dso, symbol, raw_buf)
29 elif (len(raw_buf) == 176):
30 event = PebsNHM(name, comm, dso, symbol, raw_buf)
31 else:
32 event = PerfEvent(name, comm, dso, symbol, raw_buf)
33
34 return event
35
36 class PerfEvent(object):
37 event_num = 0
38 def __init__(self, name, comm, dso, symbol, raw_buf, ev_type=EVTYPE_GENERIC):
39 self.name = name
40 self.comm = comm
41 self.dso = dso
42 self.symbol = symbol
43 self.raw_buf = raw_buf
44 self.ev_type = ev_type
45 PerfEvent.event_num += 1
46
47 def show(self):
48 print("PMU event: name=%12s, symbol=%24s, comm=%8s, dso=%12s" %
49 (self.name, self.symbol, self.comm, self.dso))
50
51 #
52 # Basic Intel PEBS (Precise Event-based Sampling) event, whose raw buffer
53 # contains the context info when that event happened: the EFLAGS and
54 # linear IP info, as well as all the registers.
55 #
56 class PebsEvent(PerfEvent):
57 pebs_num = 0
58 def __init__(self, name, comm, dso, symbol, raw_buf, ev_type=EVTYPE_PEBS):
59 tmp_buf=raw_buf[0:80]
60 flags, ip, ax, bx, cx, dx, si, di, bp, sp = struct.unpack('QQQQQQQQQQ', tmp_buf)
61 self.flags = flags
62 self.ip = ip
63 self.ax = ax
64 self.bx = bx
65 self.cx = cx
66 self.dx = dx
67 self.si = si
68 self.di = di
69 self.bp = bp
70 self.sp = sp
71
72 PerfEvent.__init__(self, name, comm, dso, symbol, raw_buf, ev_type)
73 PebsEvent.pebs_num += 1
74 del tmp_buf
75
76 #
77 # Intel Nehalem and Westmere support PEBS plus Load Latency info which lie
78 # in the four 64 bit words write after the PEBS data:
79 # Status: records the IA32_PERF_GLOBAL_STATUS register value
80 # DLA: Data Linear Address (EIP)
81 # DSE: Data Source Encoding, where the latency happens, hit or miss
82 # in L1/L2/L3 or IO operations
83 # LAT: the actual latency in cycles
84 #
85 class PebsNHM(PebsEvent):
86 pebs_nhm_num = 0
87 def __init__(self, name, comm, dso, symbol, raw_buf, ev_type=EVTYPE_PEBS_LL):
88 tmp_buf=raw_buf[144:176]
89 status, dla, dse, lat = struct.unpack('QQQQ', tmp_buf)
90 self.status = status
91 self.dla = dla
92 self.dse = dse
93 self.lat = lat
94
95 PebsEvent.__init__(self, name, comm, dso, symbol, raw_buf, ev_type)
96 PebsNHM.pebs_nhm_num += 1
97 del tmp_buf
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